2008-10-22 22:59:07 -04:00
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IN: compiler.cfg.value-numbering.tests
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USING: compiler.cfg.value-numbering compiler.cfg.instructions
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2008-11-06 10:27:52 -05:00
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compiler.cfg.registers cpu.architecture tools.test kernel math ;
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2008-10-22 22:59:07 -04:00
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[
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{
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T{ ##peek f V int-regs 45 D 1 }
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2008-10-23 03:49:26 -04:00
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T{ ##copy f V int-regs 48 V int-regs 45 }
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2008-10-22 22:59:07 -04:00
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T{ ##compare-imm-branch f V int-regs 45 7 cc/= }
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}
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] [
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{
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T{ ##peek f V int-regs 45 D 1 }
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T{ ##copy f V int-regs 48 V int-regs 45 }
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T{ ##compare-imm-branch f V int-regs 48 7 cc/= }
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} value-numbering
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] unit-test
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[
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{
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2008-10-23 03:49:26 -04:00
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T{ ##load-immediate f V int-regs 2 8 }
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2008-10-22 22:59:07 -04:00
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T{ ##peek f V int-regs 3 D 0 }
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T{ ##slot-imm f V int-regs 4 V int-regs 3 1 3 }
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T{ ##replace f V int-regs 4 D 0 }
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}
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] [
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{
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T{ ##load-immediate f V int-regs 2 8 }
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T{ ##peek f V int-regs 3 D 0 }
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T{ ##slot-imm f V int-regs 4 V int-regs 3 1 3 }
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T{ ##replace f V int-regs 4 D 0 }
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} value-numbering
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] unit-test
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[ t ] [
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{
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T{ ##peek f V int-regs 1 D 0 }
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T{ ##dispatch f V int-regs 1 V int-regs 2 }
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} dup value-numbering =
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] unit-test
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[ t ] [
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{
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T{ ##peek f V int-regs 16 D 0 }
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T{ ##peek f V int-regs 17 D -1 }
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T{ ##sar-imm f V int-regs 18 V int-regs 17 3 }
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T{ ##add-imm f V int-regs 19 V int-regs 16 13 }
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T{ ##add f V int-regs 21 V int-regs 18 V int-regs 19 }
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T{ ##alien-unsigned-1 f V int-regs 22 V int-regs 21 }
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T{ ##shl-imm f V int-regs 23 V int-regs 22 3 }
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T{ ##replace f V int-regs 23 D 0 }
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} dup value-numbering =
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] unit-test
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2008-10-23 06:27:54 -04:00
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[
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{
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T{ ##peek f V int-regs 1 D 0 }
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T{ ##shl-imm f V int-regs 2 V int-regs 1 3 }
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T{ ##shr-imm f V int-regs 3 V int-regs 2 3 }
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T{ ##replace f V int-regs 1 D 0 }
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}
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] [
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{
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T{ ##peek f V int-regs 1 D 0 }
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T{ ##mul-imm f V int-regs 2 V int-regs 1 8 }
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T{ ##shr-imm f V int-regs 3 V int-regs 2 3 }
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T{ ##replace f V int-regs 3 D 0 }
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} value-numbering
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] unit-test
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2008-11-06 10:27:52 -05:00
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[
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{
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T{ ##load-indirect f V int-regs 1 + }
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T{ ##peek f V int-regs 2 D 0 }
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T{ ##compare f V int-regs 4 V int-regs 2 V int-regs 1 cc> }
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T{ ##compare f V int-regs 6 V int-regs 2 V int-regs 1 cc> }
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T{ ##replace f V int-regs 4 D 0 }
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}
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] [
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{
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T{ ##load-indirect f V int-regs 1 + }
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T{ ##peek f V int-regs 2 D 0 }
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T{ ##compare f V int-regs 4 V int-regs 2 V int-regs 1 cc> }
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T{ ##compare-imm f V int-regs 6 V int-regs 4 7 cc/= }
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T{ ##replace f V int-regs 6 D 0 }
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} value-numbering
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] unit-test
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[
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{
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T{ ##load-indirect f V int-regs 1 + }
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T{ ##peek f V int-regs 2 D 0 }
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T{ ##compare f V int-regs 4 V int-regs 2 V int-regs 1 cc<= }
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T{ ##compare f V int-regs 6 V int-regs 2 V int-regs 1 cc> }
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T{ ##replace f V int-regs 6 D 0 }
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}
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] [
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{
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T{ ##load-indirect f V int-regs 1 + }
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T{ ##peek f V int-regs 2 D 0 }
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T{ ##compare f V int-regs 4 V int-regs 2 V int-regs 1 cc<= }
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T{ ##compare-imm f V int-regs 6 V int-regs 4 7 cc= }
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T{ ##replace f V int-regs 6 D 0 }
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} value-numbering
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] unit-test
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[
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{
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T{ ##peek f V int-regs 8 D 0 }
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T{ ##peek f V int-regs 9 D -1 }
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T{ ##unbox-float f V double-float-regs 10 V int-regs 8 }
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T{ ##unbox-float f V double-float-regs 11 V int-regs 9 }
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T{ ##compare-float f V int-regs 12 V double-float-regs 10 V double-float-regs 11 cc< }
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T{ ##compare-float f V int-regs 14 V double-float-regs 10 V double-float-regs 11 cc>= }
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T{ ##replace f V int-regs 14 D 0 }
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}
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] [
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{
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T{ ##peek f V int-regs 8 D 0 }
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T{ ##peek f V int-regs 9 D -1 }
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T{ ##unbox-float f V double-float-regs 10 V int-regs 8 }
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T{ ##unbox-float f V double-float-regs 11 V int-regs 9 }
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T{ ##compare-float f V int-regs 12 V double-float-regs 10 V double-float-regs 11 cc< }
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T{ ##compare-imm f V int-regs 14 V int-regs 12 7 cc= }
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T{ ##replace f V int-regs 14 D 0 }
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} value-numbering
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] unit-test
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[
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{
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T{ ##peek f V int-regs 29 D -1 }
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T{ ##peek f V int-regs 30 D -2 }
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T{ ##compare f V int-regs 33 V int-regs 29 V int-regs 30 cc<= }
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T{ ##compare-branch f V int-regs 29 V int-regs 30 cc<= }
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}
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] [
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{
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T{ ##peek f V int-regs 29 D -1 }
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T{ ##peek f V int-regs 30 D -2 }
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T{ ##compare f V int-regs 33 V int-regs 29 V int-regs 30 cc<= }
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T{ ##compare-imm-branch f V int-regs 33 7 cc/= }
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} value-numbering
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] unit-test
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