2009-05-04 02:46:13 -04:00
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namespace factor
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{
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2009-05-02 05:04:19 -04:00
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#define FACTOR_CPU_STRING "ppc"
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2010-03-31 15:19:14 -04:00
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#define CALLSTACK_BOTTOM(ctx) (stack_frame *)(ctx->callstack_seg->end - 32)
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2010-03-26 22:44:43 -04:00
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2009-05-07 20:47:38 -04:00
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/* In the instruction sequence:
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LOAD32 r3,...
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B blah
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the offset from the immediate operand to LOAD32 to the instruction after
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2010-01-12 09:02:10 -05:00
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the branch is one instruction. */
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static const fixnum xt_tail_pic_offset = 4;
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2009-05-07 20:47:38 -04:00
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2009-05-06 16:39:03 -04:00
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inline static void check_call_site(cell return_address)
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{
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cell insn = *(cell *)return_address;
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2009-05-07 20:47:38 -04:00
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/* Check that absolute bit is 0 */
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assert((insn & 0x2) == 0x0);
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/* Check that instruction is branch */
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2009-05-06 16:39:03 -04:00
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assert((insn >> 26) == 0x12);
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}
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2009-05-08 16:05:55 -04:00
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static const cell b_mask = 0x3fffffc;
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2009-05-06 16:39:03 -04:00
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inline static void *get_call_target(cell return_address)
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{
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return_address -= sizeof(cell);
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check_call_site(return_address);
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2009-05-07 20:47:38 -04:00
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2009-05-06 16:39:03 -04:00
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cell insn = *(cell *)return_address;
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2009-05-08 18:41:22 -04:00
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cell unsigned_addr = (insn & b_mask);
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2009-05-06 16:39:03 -04:00
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fixnum signed_addr = (fixnum)(unsigned_addr << 6) >> 6;
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return (void *)(signed_addr + return_address);
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}
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inline static void set_call_target(cell return_address, void *target)
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{
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return_address -= sizeof(cell);
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check_call_site(return_address);
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2009-05-07 20:47:38 -04:00
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2009-05-06 16:39:03 -04:00
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cell insn = *(cell *)return_address;
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2009-05-07 20:47:38 -04:00
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fixnum relative_address = ((cell)target - return_address);
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2009-05-08 18:41:22 -04:00
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insn = ((insn & ~b_mask) | (relative_address & b_mask));
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2009-05-06 16:39:03 -04:00
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*(cell *)return_address = insn;
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/* Flush the cache line containing the call we just patched */
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__asm__ __volatile__ ("icbi 0, %0\n" "sync\n"::"r" (return_address):);
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}
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2009-05-07 20:47:38 -04:00
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inline static bool tail_call_site_p(cell return_address)
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{
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return_address -= sizeof(cell);
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cell insn = *(cell *)return_address;
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return (insn & 0x1) == 0;
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}
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2009-09-14 00:37:28 -04:00
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inline static unsigned int fpu_status(unsigned int status)
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{
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2010-02-06 02:06:26 -05:00
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unsigned int r = 0;
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2009-09-14 00:37:28 -04:00
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2010-02-06 02:06:26 -05:00
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if (status & 0x20000000)
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2009-09-14 04:09:03 -04:00
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r |= FP_TRAP_INVALID_OPERATION;
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2010-02-06 02:06:26 -05:00
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if (status & 0x10000000)
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2009-09-14 04:09:03 -04:00
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r |= FP_TRAP_OVERFLOW;
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2010-02-06 02:06:26 -05:00
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if (status & 0x08000000)
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2009-09-14 04:09:03 -04:00
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r |= FP_TRAP_UNDERFLOW;
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2010-02-06 02:06:26 -05:00
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if (status & 0x04000000)
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2009-09-14 04:09:03 -04:00
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r |= FP_TRAP_ZERO_DIVIDE;
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2010-02-06 02:06:26 -05:00
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if (status & 0x02000000)
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2009-09-14 04:09:03 -04:00
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r |= FP_TRAP_INEXACT;
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2009-09-14 00:37:28 -04:00
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2010-02-06 02:06:26 -05:00
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return r;
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2009-09-14 00:37:28 -04:00
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}
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2009-05-06 16:39:03 -04:00
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/* Defined in assembly */
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2009-12-21 21:42:49 -05:00
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VM_C_API void flush_icache(cell start, cell len);
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2009-05-04 02:46:13 -04:00
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}
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