add intrinsics for v<=, v<, v=, v>, v>=, vunordered?

db4
Joe Groff 2009-10-03 11:29:34 -05:00
parent 74f15cfe8c
commit 04bb03bb61
7 changed files with 84 additions and 41 deletions

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@ -177,7 +177,12 @@ IN: compiler.cfg.intrinsics
{ math.vectors.simd.intrinsics:(simd-vor) [ [ ^^or-vector ] emit-binary-vector-op ] } { math.vectors.simd.intrinsics:(simd-vor) [ [ ^^or-vector ] emit-binary-vector-op ] }
{ math.vectors.simd.intrinsics:(simd-vxor) [ [ ^^xor-vector ] emit-binary-vector-op ] } { math.vectors.simd.intrinsics:(simd-vxor) [ [ ^^xor-vector ] emit-binary-vector-op ] }
{ math.vectors.simd.intrinsics:(simd-vnot) [ [ ^^not-vector ] emit-unary-vector-op ] } { math.vectors.simd.intrinsics:(simd-vnot) [ [ ^^not-vector ] emit-unary-vector-op ] }
{ math.vectors.simd.intrinsics:(simd-v<=) [ [ cc<= ^^compare-vector ] emit-binary-vector-op ] }
{ math.vectors.simd.intrinsics:(simd-v<) [ [ cc< ^^compare-vector ] emit-binary-vector-op ] }
{ math.vectors.simd.intrinsics:(simd-v=) [ [ cc= ^^compare-vector ] emit-binary-vector-op ] } { math.vectors.simd.intrinsics:(simd-v=) [ [ cc= ^^compare-vector ] emit-binary-vector-op ] }
{ math.vectors.simd.intrinsics:(simd-v>) [ [ cc> ^^compare-vector ] emit-binary-vector-op ] }
{ math.vectors.simd.intrinsics:(simd-v>=) [ [ cc>= ^^compare-vector ] emit-binary-vector-op ] }
{ math.vectors.simd.intrinsics:(simd-vunordered?) [ [ cc/<>= ^^compare-vector ] emit-binary-vector-op ] }
{ math.vectors.simd.intrinsics:(simd-vany?) [ [ vcc-any ^^test-vector ] emit-unary-vector-op ] } { math.vectors.simd.intrinsics:(simd-vany?) [ [ vcc-any ^^test-vector ] emit-unary-vector-op ] }
{ math.vectors.simd.intrinsics:(simd-vall?) [ [ vcc-all ^^test-vector ] emit-unary-vector-op ] } { math.vectors.simd.intrinsics:(simd-vall?) [ [ vcc-all ^^test-vector ] emit-unary-vector-op ] }
{ math.vectors.simd.intrinsics:(simd-vnone?) [ [ vcc-none ^^test-vector ] emit-unary-vector-op ] } { math.vectors.simd.intrinsics:(simd-vnone?) [ [ vcc-none ^^test-vector ] emit-unary-vector-op ] }

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@ -31,7 +31,12 @@ IN: compiler.tree.propagation.simd
(simd-hlshift) (simd-hlshift)
(simd-hrshift) (simd-hrshift)
(simd-vshuffle) (simd-vshuffle)
(simd-v<=)
(simd-v<)
(simd-v=) (simd-v=)
(simd-v>)
(simd-v>=)
(simd-vunordered?)
(simd-with) (simd-with)
(simd-gather-2) (simd-gather-2)
(simd-gather-4) (simd-gather-4)

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@ -256,7 +256,7 @@ HOOK: %fill-vector-reps cpu ( -- reps )
HOOK: %gather-vector-2-reps cpu ( -- reps ) HOOK: %gather-vector-2-reps cpu ( -- reps )
HOOK: %gather-vector-4-reps cpu ( -- reps ) HOOK: %gather-vector-4-reps cpu ( -- reps )
HOOK: %shuffle-vector-reps cpu ( -- reps ) HOOK: %shuffle-vector-reps cpu ( -- reps )
HOOK: %compare-vector-reps cpu ( -- reps ) HOOK: %compare-vector-reps cpu ( cc -- reps )
HOOK: %test-vector-reps cpu ( -- reps ) HOOK: %test-vector-reps cpu ( -- reps )
HOOK: %add-vector-reps cpu ( -- reps ) HOOK: %add-vector-reps cpu ( -- reps )
HOOK: %saturated-add-vector-reps cpu ( -- reps ) HOOK: %saturated-add-vector-reps cpu ( -- reps )

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@ -262,7 +262,7 @@ M: ppc %fill-vector-reps { } ;
M: ppc %gather-vector-2-reps { } ; M: ppc %gather-vector-2-reps { } ;
M: ppc %gather-vector-4-reps { } ; M: ppc %gather-vector-4-reps { } ;
M: ppc %shuffle-vector-reps { } ; M: ppc %shuffle-vector-reps { } ;
M: ppc %compare-vector-reps { } ; M: ppc %compare-vector-reps drop { } ;
M: ppc %test-vector-reps { } ; M: ppc %test-vector-reps { } ;
M: ppc %add-vector-reps { } ; M: ppc %add-vector-reps { } ;
M: ppc %saturated-add-vector-reps { } ; M: ppc %saturated-add-vector-reps { } ;

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@ -770,12 +770,30 @@ M: x86 %compare-vector ( dst src1 src2 temp rep cc -- )
[ %compare-float-vector ] [ %compare-float-vector ]
[ %compare-int-vector ] if ; [ %compare-int-vector ] if ;
M: x86 %compare-vector-reps : %compare-vector-eq-reps ( -- reps )
{ {
{ sse? { float-4-rep } } { sse? { float-4-rep } }
{ sse2? { double-2-rep char-16-rep uchar-16-rep short-8-rep ushort-8-rep int-4-rep uint-4-rep } } { sse2? { double-2-rep char-16-rep uchar-16-rep short-8-rep ushort-8-rep int-4-rep uint-4-rep } }
{ sse4.1? { longlong-2-rep ulonglong-2-rep } } { sse4.1? { longlong-2-rep ulonglong-2-rep } }
} available-reps ; } available-reps ;
: %compare-vector-unord-reps ( -- reps )
{
{ sse? { float-4-rep } }
{ sse2? { double-2-rep } }
} available-reps ;
: %compare-vector-ord-reps ( -- reps )
{
{ sse? { float-4-rep } }
{ sse2? { double-2-rep char-16-rep short-8-rep int-4-rep } }
{ sse4.1? { longlong-2-rep } }
} available-reps ;
M: x86 %compare-vector-reps
{
{ [ dup { cc= cc/= } memq? ] [ drop %compare-vector-eq-reps ] }
{ [ dup { cc<>= cc/<>= } memq? ] [ drop %compare-vector-unord-reps ] }
[ drop %compare-vector-ord-reps ]
} cond ;
:: %test-vector-mask ( dst temp mask vcc -- ) :: %test-vector-mask ( dst temp mask vcc -- )
vcc { vcc {

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@ -1,9 +1,9 @@
! Copyright (C) 2009 Slava Pestov. ! Copyright (C) 2009 Slava Pestov.
! See http://factorcode.org/license.txt for BSD license. ! See http://factorcode.org/license.txt for BSD license.
USING: alien alien.c-types alien.data assocs combinators USING: alien alien.c-types alien.data assocs combinators
cpu.architecture fry generalizations kernel libc macros math cpu.architecture compiler.cfg.comparisons fry generalizations
sequences effects accessors namespaces lexer parser vocabs.parser kernel libc macros math sequences effects accessors namespaces
words arrays math.vectors ; lexer parser vocabs.parser words arrays math.vectors ;
IN: math.vectors.simd.intrinsics IN: math.vectors.simd.intrinsics
ERROR: bad-simd-call ; ERROR: bad-simd-call ;
@ -55,7 +55,12 @@ SIMD-OP: vrshift
SIMD-OP: hlshift SIMD-OP: hlshift
SIMD-OP: hrshift SIMD-OP: hrshift
SIMD-OP: vshuffle SIMD-OP: vshuffle
SIMD-OP: v<=
SIMD-OP: v<
SIMD-OP: v= SIMD-OP: v=
SIMD-OP: v>
SIMD-OP: v>=
SIMD-OP: vunordered?
SIMD-OP: vany? SIMD-OP: vany?
SIMD-OP: vall? SIMD-OP: vall?
SIMD-OP: vnone? SIMD-OP: vnone?
@ -113,39 +118,44 @@ GENERIC# supported-simd-op? 1 ( rep intrinsic -- ? )
M: vector-rep supported-simd-op? M: vector-rep supported-simd-op?
{ {
{ \ (simd-v+) [ %add-vector-reps ] } { \ (simd-v+) [ %add-vector-reps ] }
{ \ (simd-vs+) [ %saturated-add-vector-reps ] } { \ (simd-vs+) [ %saturated-add-vector-reps ] }
{ \ (simd-v+-) [ %add-sub-vector-reps ] } { \ (simd-v+-) [ %add-sub-vector-reps ] }
{ \ (simd-v-) [ %sub-vector-reps ] } { \ (simd-v-) [ %sub-vector-reps ] }
{ \ (simd-vs-) [ %saturated-sub-vector-reps ] } { \ (simd-vs-) [ %saturated-sub-vector-reps ] }
{ \ (simd-v*) [ %mul-vector-reps ] } { \ (simd-v*) [ %mul-vector-reps ] }
{ \ (simd-vs*) [ %saturated-mul-vector-reps ] } { \ (simd-vs*) [ %saturated-mul-vector-reps ] }
{ \ (simd-v/) [ %div-vector-reps ] } { \ (simd-v/) [ %div-vector-reps ] }
{ \ (simd-vmin) [ %min-vector-reps ] } { \ (simd-vmin) [ %min-vector-reps ] }
{ \ (simd-vmax) [ %max-vector-reps ] } { \ (simd-vmax) [ %max-vector-reps ] }
{ \ (simd-v.) [ %dot-vector-reps ] } { \ (simd-v.) [ %dot-vector-reps ] }
{ \ (simd-vsqrt) [ %sqrt-vector-reps ] } { \ (simd-vsqrt) [ %sqrt-vector-reps ] }
{ \ (simd-sum) [ %horizontal-add-vector-reps ] } { \ (simd-sum) [ %horizontal-add-vector-reps ] }
{ \ (simd-vabs) [ %abs-vector-reps ] } { \ (simd-vabs) [ %abs-vector-reps ] }
{ \ (simd-vbitand) [ %and-vector-reps ] } { \ (simd-vbitand) [ %and-vector-reps ] }
{ \ (simd-vbitandn) [ %andn-vector-reps ] } { \ (simd-vbitandn) [ %andn-vector-reps ] }
{ \ (simd-vbitor) [ %or-vector-reps ] } { \ (simd-vbitor) [ %or-vector-reps ] }
{ \ (simd-vbitxor) [ %xor-vector-reps ] } { \ (simd-vbitxor) [ %xor-vector-reps ] }
{ \ (simd-vbitnot) [ %not-vector-reps ] } { \ (simd-vbitnot) [ %not-vector-reps ] }
{ \ (simd-vand) [ %and-vector-reps ] } { \ (simd-vand) [ %and-vector-reps ] }
{ \ (simd-vandn) [ %andn-vector-reps ] } { \ (simd-vandn) [ %andn-vector-reps ] }
{ \ (simd-vor) [ %or-vector-reps ] } { \ (simd-vor) [ %or-vector-reps ] }
{ \ (simd-vxor) [ %xor-vector-reps ] } { \ (simd-vxor) [ %xor-vector-reps ] }
{ \ (simd-vnot) [ %not-vector-reps ] } { \ (simd-vnot) [ %not-vector-reps ] }
{ \ (simd-vlshift) [ %shl-vector-reps ] } { \ (simd-vlshift) [ %shl-vector-reps ] }
{ \ (simd-vrshift) [ %shr-vector-reps ] } { \ (simd-vrshift) [ %shr-vector-reps ] }
{ \ (simd-hlshift) [ %horizontal-shl-vector-reps ] } { \ (simd-hlshift) [ %horizontal-shl-vector-reps ] }
{ \ (simd-hrshift) [ %horizontal-shr-vector-reps ] } { \ (simd-hrshift) [ %horizontal-shr-vector-reps ] }
{ \ (simd-vshuffle) [ %shuffle-vector-reps ] } { \ (simd-vshuffle) [ %shuffle-vector-reps ] }
{ \ (simd-v=) [ %compare-vector-reps ] } { \ (simd-v<=) [ cc<= %compare-vector-reps ] }
{ \ (simd-gather-2) [ %gather-vector-2-reps ] } { \ (simd-v<) [ cc< %compare-vector-reps ] }
{ \ (simd-gather-4) [ %gather-vector-4-reps ] } { \ (simd-v=) [ cc= %compare-vector-reps ] }
{ \ (simd-vany?) [ %test-vector-reps ] } { \ (simd-v>) [ cc> %compare-vector-reps ] }
{ \ (simd-vall?) [ %test-vector-reps ] } { \ (simd-v>=) [ cc>= %compare-vector-reps ] }
{ \ (simd-vnone?) [ %test-vector-reps ] } { \ (simd-vunordered?) [ cc/<>= %compare-vector-reps ] }
{ \ (simd-gather-2) [ %gather-vector-2-reps ] }
{ \ (simd-gather-4) [ %gather-vector-4-reps ] }
{ \ (simd-vany?) [ %test-vector-reps ] }
{ \ (simd-vall?) [ %test-vector-reps ] }
{ \ (simd-vnone?) [ %test-vector-reps ] }
} case member? ; } case member? ;

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@ -98,7 +98,12 @@ H{
{ hrshift { +vector+ +literal+ -> +vector+ } } { hrshift { +vector+ +literal+ -> +vector+ } }
{ vshuffle { +vector+ +literal+ -> +vector+ } } { vshuffle { +vector+ +literal+ -> +vector+ } }
{ vbroadcast { +vector+ +literal+ -> +vector+ } } { vbroadcast { +vector+ +literal+ -> +vector+ } }
{ v<= { +vector+ +vector+ -> +vector+ } }
{ v< { +vector+ +vector+ -> +vector+ } }
{ v= { +vector+ +vector+ -> +vector+ } } { v= { +vector+ +vector+ -> +vector+ } }
{ v> { +vector+ +vector+ -> +vector+ } }
{ v>= { +vector+ +vector+ -> +vector+ } }
{ vunordered? { +vector+ +vector+ -> +vector+ } }
{ vany? { +vector+ -> +scalar+ } } { vany? { +vector+ -> +scalar+ } }
{ vall? { +vector+ -> +scalar+ } } { vall? { +vector+ -> +scalar+ } }
{ vnone? { +vector+ -> +scalar+ } } { vnone? { +vector+ -> +scalar+ } }