diff --git a/basis/cpu/architecture/architecture.factor b/basis/cpu/architecture/architecture.factor
index 8c1ac6d314..2d9bf8f0a3 100644
--- a/basis/cpu/architecture/architecture.factor
+++ b/basis/cpu/architecture/architecture.factor
@@ -150,18 +150,17 @@ SINGLETONS: int-regs float-regs ;
 UNION: reg-class int-regs float-regs ;
 CONSTANT: reg-classes { int-regs float-regs }
 
-! On x86, vectors and floats are stored in the same register bank
-! On PowerPC they are distinct
-HOOK: vector-regs cpu ( -- reg-class )
-
 GENERIC: reg-class-of ( rep -- reg-class )
 
 M: tagged-rep reg-class-of drop int-regs ;
 M: int-rep reg-class-of drop int-regs ;
 M: float-rep reg-class-of drop float-regs ;
 M: double-rep reg-class-of drop float-regs ;
-M: vector-rep reg-class-of drop vector-regs ;
-M: scalar-rep reg-class-of drop vector-regs ;
+
+! Note that on PowerPC, vectors and floats are stored in different
+! register banks. But Factor doesn't support SIMD on that platform.
+M: vector-rep reg-class-of drop float-regs ;
+M: scalar-rep reg-class-of drop float-regs ;
 
 GENERIC: rep-size ( rep -- n ) foldable
 
diff --git a/basis/cpu/ppc/ppc.factor b/basis/cpu/ppc/ppc.factor
index 9302f4e5b8..477b949dc3 100644
--- a/basis/cpu/ppc/ppc.factor
+++ b/basis/cpu/ppc/ppc.factor
@@ -46,9 +46,6 @@ CONSTANT: vm-reg         16
 
 enable-float-intrinsics
 
-M: ppc vector-regs ( -- reg-class )
-    float-regs ;
-
 M: ppc machine-registers ( -- assoc )
     {
         { int-regs $[ 3 12 [a,b] 17 29 [a,b] append ] }
diff --git a/basis/cpu/x86/x86.factor b/basis/cpu/x86/x86.factor
index ad82f33623..6c5e5d610a 100644
--- a/basis/cpu/x86/x86.factor
+++ b/basis/cpu/x86/x86.factor
@@ -19,8 +19,6 @@ IN: cpu.x86
 M: label JMP 0 JMP rc-relative label-fixup ;
 M: label JUMPcc [ 0 ] dip JUMPcc rc-relative label-fixup ;
 
-M: x86 vector-regs float-regs ;
-
 HOOK: stack-reg cpu ( -- reg )
 
 HOOK: reserved-stack-space cpu ( -- n )