From 12d91ef72a39294eb12f1ec46c165f53f4fde2c4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bj=C3=B6rn=20Lindqvist?= Date: Wed, 25 May 2016 19:19:08 +0200 Subject: [PATCH] cpu.*: more docs --- .../cpu/architecture/architecture-docs.factor | 93 ++++++++++++------- basis/cpu/x86/assembler/assembler-docs.factor | 14 ++- basis/cpu/x86/x86-docs.factor | 9 +- 3 files changed, 77 insertions(+), 39 deletions(-) diff --git a/basis/cpu/architecture/architecture-docs.factor b/basis/cpu/architecture/architecture-docs.factor index b3117afe40..abaed8e185 100644 --- a/basis/cpu/architecture/architecture-docs.factor +++ b/basis/cpu/architecture/architecture-docs.factor @@ -73,40 +73,6 @@ init-relocation [ RAX RBX 3 -14 RCX RDX %write-barrier ] B{ } make disassemble ; >> -HELP: double-2-rep -{ $var-description "Representation for a pair of doubles." } ; - -HELP: signed-rep -{ $values { "rep" representation } { "rep'" representation } } -{ $description "Maps any representation to its signed counterpart, if it has one." } ; - -HELP: rep-size -{ $values { "rep" representation } { "n" integer } } -{ $description "Size in bytes of a representation." } ; - -HELP: immediate-arithmetic? -{ $values { "n" number } { "?" boolean } } -{ $description - "Can this value be an immediate operand for " { $link %add-imm } ", " - { $link %sub-imm } ", or " { $link %mul-imm } "?" -} ; - -HELP: machine-registers -{ $values { "assoc" assoc } } -{ $description "Mapping from register class to machine registers. Only registers not reserved by the Factor VM are included." } ; - -HELP: vm-stack-space -{ $values { "n" number } } -{ $description "Parameter space to reserve in anything making VM calls." } ; - -HELP: complex-addressing? -{ $values { "?" boolean } } -{ $description "Specifies if " { $link %slot } ", " { $link %set-slot } " and " { $link %write-barrier } " accept the 'scale' and 'tag' parameters, and if %load-memory and %store-memory work." } ; - -HELP: param-regs -{ $values { "abi" "a calling convention symbol" } { "regs" assoc } } -{ $description "Retrieves the order in which machine registers are used for parameters for the given calling convention." } ; - HELP: %alien-invoke { $values { "reg-inputs" sequence } @@ -135,6 +101,14 @@ HELP: %allot { $unchecked-example $[ ex-%allot ] } } ; +HELP: %and-imm +{ $values + { "dst" "destination register" } + { "src1" "first source register" } + { "src2" "second source register" } +} +{ $description "Emits an " { $link AND } " instruction between a register and an immediate." } ; + HELP: %box { $values { "dst" "destination register" } @@ -234,7 +208,7 @@ HELP: %replace-imm { "src" integer } { "loc" loc } } -{ $description "Emits machine code for putting an integer on the stack." } +{ $description "Emits machine code for putting a literal on the stack." } { $examples { $unchecked-example "USING: cpu.architecture make ;" @@ -268,6 +242,14 @@ HELP: %set-slot } } ; +HELP: %shl-imm +{ $values + { "dst" "register" } + { "src1" "register" } + { "src2" integer } +} { $description "Bitshifts the value in a register left by a constant." } +{ $see-also ##shl-imm } ; + HELP: %store-memory-imm { $values { "value" "source register" } @@ -285,6 +267,14 @@ HELP: %store-memory-imm } } ; +HELP: %test-imm-branch +{ $values + { "label" "branch destination" } + { "src1" "register" } + { "src2" "immediate" } + { "cc" "comparison symbol" } +} { $description "Emits a TEST instruction with a register and an immediate, followed by a branch." } ; + HELP: %vector>scalar { $values { "dst" "destination register" } @@ -305,6 +295,39 @@ HELP: %write-barrier { $description "Generates code for the " { $link ##write-barrier } " instruction." } { $examples { $unchecked-example $[ ex-%write-barrier ] } } ; +HELP: double-2-rep +{ $var-description "Representation for a pair of doubles." } ; + +HELP: signed-rep +{ $values { "rep" representation } { "rep'" representation } } +{ $description "Maps any representation to its signed counterpart, if it has one." } ; + +HELP: rep-size +{ $values { "rep" representation } { "n" integer } } +{ $description "Size in bytes of a representation." } ; + +HELP: immediate-arithmetic? +{ $values { "n" number } { "?" boolean } } +{ $description + "Can this value be an immediate operand for " { $link %add-imm } ", " + { $link %sub-imm } ", or " { $link %mul-imm } "?" +} ; + +HELP: machine-registers +{ $values { "assoc" assoc } } +{ $description "Mapping from register class to machine registers. Only registers not reserved by the Factor VM are included." } ; + +HELP: vm-stack-space +{ $values { "n" number } } +{ $description "Parameter space to reserve in anything making VM calls." } ; + +HELP: complex-addressing? +{ $values { "?" boolean } } +{ $description "Specifies if " { $link %slot } ", " { $link %set-slot } " and " { $link %write-barrier } " accept the 'scale' and 'tag' parameters, and if %load-memory and %store-memory work." } ; + +HELP: param-regs +{ $values { "abi" "a calling convention symbol" } { "regs" assoc } } +{ $description "Retrieves the order in which machine registers are used for parameters for the given calling convention." } ; HELP: test-instruction? { $values { "?" boolean } } { $description "Does the current architecture have a test instruction? Used on x86 to rewrite some " { $link CMP } " instructions to less expensive " { $link TEST } "s." } ; diff --git a/basis/cpu/x86/assembler/assembler-docs.factor b/basis/cpu/x86/assembler/assembler-docs.factor index 05afce5f39..9085552367 100644 --- a/basis/cpu/x86/assembler/assembler-docs.factor +++ b/basis/cpu/x86/assembler/assembler-docs.factor @@ -33,6 +33,14 @@ HELP: MOV { $values { "dst" "destination" } { "src" "source" } } { $description "Moves a value from one place to another." } ; +HELP: MOVSX +{ $values { "dst" "destination" } { "src" "source" } } +{ $description "Moves a value with sign extension." } ; + +HELP: PEXTRB +{ $values { "dest" "destination" } { "src" "source" } { "imm" "immediate" } } +{ $description "Packed extract byte. This instruction copies the byte selected by 'imm' into the first eight bits of the selected register." } ; + HELP: immediate-1/4 { $values { "dst" "dst" } { "imm" "imm" } { "reg,rex.w,opcode" sequence } } { $description "If imm is a byte, compile the opcode and the byte. Otherwise, set the 8-bit operand flag in the opcode, and compile the cell. The 'reg' is not really a register, but a value for the 'reg' field of the mod-r/m byte." } ; @@ -44,7 +52,9 @@ HELP: zero-extendable? ARTICLE: "cpu.x86.assembler" "X86 assembler" "This vocab implements an assembler for x86 architectures." $nl -"Instructions:" -{ $subsections MOV } ; +"General instructions:" +{ $subsections DEC INC JE MOV MOVSX } +"SSE instructions:" +{ $subsections PEXTRB } ; ABOUT: "cpu.x86.assembler" diff --git a/basis/cpu/x86/x86-docs.factor b/basis/cpu/x86/x86-docs.factor index 3b3047e685..eca47be0c4 100644 --- a/basis/cpu/x86/x86-docs.factor +++ b/basis/cpu/x86/x86-docs.factor @@ -1,5 +1,6 @@ -USING: cpu.x86.assembler cpu.x86.assembler.operands.private help.markup -help.syntax layouts math ; +USING: compiler.cfg.registers cpu.x86.assembler +cpu.x86.assembler.operands.private help.markup help.syntax layouts +math ; IN: cpu.x86 HELP: %boolean @@ -82,6 +83,10 @@ HELP: load-zone-offset } } ; +HELP: loc>operand +{ $values { "loc" loc } { "operand" indirect } } +{ $description "Converts a stack location to an operand passable to the " { $link MOV } " instruction." } ; + HELP: store-tagged { $values { "dst" "a register symbol" } { "tag" "a builtin class" } } { $description "Tags the register with the tag number for the given class." }