Merge branch 'master' of git://factorcode.org/git/factor

basis/compiler/cfg/linear-scan/assignment/assignment.factor

@@ -108,11 +108,14 @@ SYMBOL: check-assignment?
 
 ERROR: overlapping-registers intervals ;
 
+: check-assignment ( intervals -- )
+    dup [ copy-from>> ] map sift '[ vreg>> _ member? not ] filter
+    dup [ reg>> ] map all-unique? [ drop ] [ overlapping-registers ] if ;
+
 : active-intervals ( insn -- intervals )
     insn#>> pending-intervals get [ covers? ] with filter
     check-assignment? get [
-        dup [ reg>> ] map all-unique?
-        [ overlapping-registers ] unless
+        dup check-assignment
     ] when ;
 
 M: vreg-insn assign-registers-in-insn

basis/compiler/cfg/stack-analysis/stack-analysis-tests.factor

@@ -17,8 +17,6 @@ IN: compiler.cfg.stack-analysis.tests
 : linearize ( cfg -- mr )
     flatten-cfg instructions>> ;
 
-local-only? off
-
 [ ] [ [ ] test-stack-analysis drop ] unit-test
 
 ! Only peek once

basis/compiler/cfg/stack-analysis/stack-analysis.factor

@@ -59,17 +59,12 @@ UNION: sync-if-back-edge
     ##dispatch
     ##loop-entry ;
 
-SYMBOL: local-only?
-
-t local-only? set-global
-
 : back-edge? ( from to -- ? )
     [ number>> ] bi@ > ;
 
 : sync-state? ( -- ? )
     basic-block get successors>>
-    [ [ predecessors>> ] keep '[ _ back-edge? ] any? ] any?
-    local-only? get or ;
+    [ [ predecessors>> ] keep '[ _ back-edge? ] any? ] any? ;
 
 M: sync-if-back-edge visit
     sync-state? [ sync-state ] when , ;

basis/cpu/x86/32/32.factor

@@ -29,13 +29,15 @@ M: x86.32 temp-reg-2 EDX ;
 
 M:: x86.32 %dispatch ( src temp -- )
     ! Load jump table base.
-    src HEX: ffffffff ADD
+    temp src HEX: ffffffff [+] LEA
+    building get length cell - :> start
     0 rc-absolute-cell rel-here
     ! Go
-    src HEX: 7f [+] JMP
+    temp HEX: 7f [+] JMP
+    building get length :> end
     ! Fix up the displacement above
     cell code-alignment
-    [ 7 + building get dup pop* push ]
+    [ end start - + building get dup pop* push ]
     [ align-code ]
     bi ;
 

basis/cpu/x86/64/64.factor

@@ -23,15 +23,17 @@ M: x86.64 rs-reg R15 ;
 M: x86.64 stack-reg RSP ;
 
 M:: x86.64 %dispatch ( src temp -- )
+    building get length :> start
     ! Load jump table base.
     temp HEX: ffffffff MOV
     0 rc-absolute-cell rel-here
     ! Add jump table base
-    src temp ADD
-    src HEX: 7f [+] JMP
+    temp src ADD
+    temp HEX: 7f [+] JMP
+    building get length :> end
     ! Fix up the displacement above
     cell code-alignment
-    [ 15 + building get dup pop* push ]
+    [ end start - 2 - + building get dup pop* push ]
     [ align-code ]
     bi ;