compiler.cfg: convert code into two-operand form before SSA destruction; SSA destruction now operates on a relaxed SSA form where multiple defs of the same vreg are allowed, but only within a single basic block. This makes linear scan's coalescing redundant, allowing it to be removed completely
parent
eb3bd1edea
commit
370f4c081d
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@ -3,7 +3,6 @@
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USING: accessors assocs heaps kernel namespaces sequences fry math
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math.order combinators arrays sorting compiler.utilities
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compiler.cfg.linear-scan.live-intervals
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compiler.cfg.linear-scan.allocation.coalescing
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compiler.cfg.linear-scan.allocation.spilling
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compiler.cfg.linear-scan.allocation.splitting
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compiler.cfg.linear-scan.allocation.state ;
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@ -29,13 +28,11 @@ IN: compiler.cfg.linear-scan.allocation
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second 0 = ; inline
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: assign-register ( new -- )
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dup coalesce? [ coalesce ] [
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dup register-status {
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{ [ dup no-free-registers? ] [ drop assign-blocked-register ] }
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{ [ 2dup register-available? ] [ register-available ] }
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[ drop assign-blocked-register ]
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} cond
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] if ;
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dup register-status {
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{ [ dup no-free-registers? ] [ drop assign-blocked-register ] }
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{ [ 2dup register-available? ] [ register-available ] }
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[ drop assign-blocked-register ]
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} cond ;
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: handle-interval ( live-interval -- )
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[
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@ -1,35 +0,0 @@
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! Copyright (C) 2009 Slava Pestov.
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! See http://factorcode.org/license.txt for BSD license.
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USING: accessors kernel sequences namespaces assocs fry
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combinators.short-circuit
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compiler.cfg.linear-scan.live-intervals
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compiler.cfg.linear-scan.allocation.state ;
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IN: compiler.cfg.linear-scan.allocation.coalescing
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: active-interval ( vreg -- live-interval )
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dup [ dup active-intervals-for [ vreg>> = ] with find nip ] when ;
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: avoids-inactive-intervals? ( live-interval -- ? )
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dup vreg>> inactive-intervals-for
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[ intervals-intersect? not ] with all? ;
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: coalesce? ( live-interval -- ? )
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{
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[ copy-from>> active-interval ]
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[ [ start>> ] [ copy-from>> active-interval end>> ] bi = ]
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[ avoids-inactive-intervals? ]
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} 1&& ;
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: reuse-spill-slot ( old new -- )
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[ vreg>> spill-slots get at ] dip '[ _ vreg>> spill-slots get set-at ] when* ;
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: reuse-register ( old new -- )
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reg>> >>reg drop ;
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: (coalesce) ( old new -- )
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[ add-active ] [ [ delete-active ] [ add-handled ] bi ] bi* ;
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: coalesce ( live-interval -- )
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dup copy-from>> active-interval
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[ reuse-spill-slot ] [ reuse-register ] [ (coalesce) ] 2tri ;
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@ -45,7 +45,7 @@ ERROR: splitting-atomic-interval ;
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f >>spill-to ; inline
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: split-after ( after -- after' )
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f >>copy-from f >>reg f >>reload-from ; inline
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f >>reg f >>reload-from ; inline
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:: split-interval ( live-interval n -- before after )
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live-interval n check-split
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@ -18,9 +18,8 @@ IN: compiler.cfg.linear-scan.debugger
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: interval-picture ( interval -- str )
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[ uses>> picture ]
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[ copy-from>> unparse ]
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[ vreg>> unparse ]
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tri 3array ;
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bi 2array ;
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: live-intervals. ( seq -- )
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[ interval-picture ] map simple-table. ;
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@ -470,7 +470,6 @@ USING: math.private ;
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clone dup [ start>> ] [ end>> ] bi <live-range> 1vector >>ranges
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] map ;
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! Coalescing interacted badly with splitting
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[ ] [
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{
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T{ live-interval
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@ -478,7 +477,6 @@ USING: math.private ;
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{ start 14 }
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{ end 17 }
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{ uses V{ 14 15 16 17 } }
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{ copy-from V int-regs 67 }
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}
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T{ live-interval
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{ vreg V int-regs 67 }
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@ -503,7 +501,6 @@ USING: math.private ;
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{ start 10 }
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{ end 18 }
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{ uses V{ 10 11 12 18 } }
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{ copy-from V int-regs 56 }
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}
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T{ live-interval
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{ vreg V int-regs 60 }
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@ -559,7 +556,6 @@ USING: math.private ;
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{ start 44 }
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{ end 56 }
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{ uses V{ 44 45 45 46 56 } }
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{ copy-from V int-regs 3686445 }
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}
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T{ live-interval
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{ vreg V int-regs 3686198 }
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@ -572,7 +568,6 @@ USING: math.private ;
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{ start 46 }
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{ end 49 }
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{ uses V{ 46 47 47 49 } }
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{ copy-from V int-regs 3686449 }
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}
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T{ live-interval
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{ vreg V int-regs 3686196 }
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@ -603,7 +598,6 @@ USING: math.private ;
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{ start 49 }
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{ end 52 }
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{ uses V{ 49 50 50 52 } }
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{ copy-from V int-regs 3686454 }
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}
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T{ live-interval
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{ vreg V int-regs 3686461 }
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@ -622,42 +616,36 @@ USING: math.private ;
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{ start 54 }
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{ end 76 }
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{ uses V{ 54 55 55 76 } }
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{ copy-from V int-regs 3686464 }
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}
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T{ live-interval
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{ vreg V int-regs 3686470 }
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{ start 58 }
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{ end 60 }
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{ uses V{ 58 59 59 60 } }
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{ copy-from V int-regs 3686469 }
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}
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T{ live-interval
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{ vreg V int-regs 3686469 }
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{ start 56 }
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{ end 58 }
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{ uses V{ 56 57 57 58 } }
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{ copy-from V int-regs 3686449 }
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}
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T{ live-interval
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{ vreg V int-regs 3686473 }
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{ start 60 }
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{ end 62 }
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{ uses V{ 60 61 61 62 } }
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{ copy-from V int-regs 3686470 }
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}
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T{ live-interval
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{ vreg V int-regs 3686479 }
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{ start 62 }
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{ end 64 }
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{ uses V{ 62 63 63 64 } }
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{ copy-from V int-regs 3686473 }
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}
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T{ live-interval
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{ vreg V int-regs 3686735 }
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{ start 78 }
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{ end 96 }
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{ uses V{ 78 79 79 96 } }
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{ copy-from V int-regs 3686372 }
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}
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T{ live-interval
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{ vreg V int-regs 3686482 }
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@ -688,7 +676,6 @@ USING: math.private ;
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{ start 66 }
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{ end 75 }
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{ uses V{ 66 67 67 75 } }
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{ copy-from V int-regs 3686483 }
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}
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T{ live-interval
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{ vreg V int-regs 3687509 }
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@ -719,7 +706,6 @@ USING: math.private ;
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{ start 69 }
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{ end 74 }
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{ uses V{ 69 70 70 74 } }
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{ copy-from V int-regs 3686491 }
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}
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T{ live-interval
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{ vreg V int-regs 3687778 }
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@ -762,7 +748,6 @@ USING: math.private ;
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{ start 72 }
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{ end 74 }
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{ uses V{ 72 73 73 74 } }
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{ copy-from V int-regs 3686499 }
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}
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T{ live-interval
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{ vreg V int-regs 3687780 }
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@ -877,7 +862,6 @@ USING: math.private ;
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{ start 27 }
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{ end 30 }
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{ uses V{ 27 28 28 30 } }
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{ copy-from V int-regs 3686300 }
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}
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T{ live-interval
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{ vreg V int-regs 3686306 }
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@ -950,7 +934,6 @@ USING: math.private ;
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{ start 243 }
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{ end 245 }
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{ uses V{ 243 244 244 245 } }
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{ copy-from V int-regs 3687845 }
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}
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T{ live-interval
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{ vreg V int-regs 3687850 }
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@ -1119,7 +1102,6 @@ USING: math.private ;
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{ start 141 }
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{ end 143 }
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{ uses V{ 141 142 142 143 } }
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{ copy-from V int-regs 3687377 }
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}
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T{ live-interval
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{ vreg V int-regs 3687381 }
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@ -1174,7 +1156,6 @@ USING: math.private ;
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{ start 293 }
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{ end 295 }
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{ uses V{ 293 294 294 295 } }
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{ copy-from V int-regs 3687087 }
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}
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T{ live-interval
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{ vreg V int-regs 3687403 }
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@ -1345,7 +1326,6 @@ USING: math.private ;
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{ start 78 }
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{ end 96 }
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{ uses V{ 78 79 96 } }
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{ copy-from V int-regs 6372 }
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}
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T{ live-interval
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{ vreg V int-regs 6483 }
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@ -13,8 +13,7 @@ C: <live-range> live-range
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TUPLE: live-interval
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vreg
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reg spill-to reload-from
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start end ranges uses
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copy-from ;
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start end ranges uses ;
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GENERIC: covers? ( insn# obj -- ? )
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@ -102,15 +101,6 @@ M: vreg-insn compute-live-intervals*
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[ [ temp-vregs ] 2dip '[ [ _ ] dip _ handle-temp ] each ]
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3tri ;
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: record-copy ( insn -- )
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[ dst>> live-intervals get at ] [ src>> ] bi >>copy-from drop ;
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M: ##copy compute-live-intervals*
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[ call-next-method ] [ record-copy ] bi ;
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M: ##copy-float compute-live-intervals*
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[ call-next-method ] [ record-copy ] bi ;
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: handle-live-out ( bb -- )
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live-out keys
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basic-block get [ block-from ] [ block-to ] bi
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@ -1,12 +1,11 @@
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! Copyright (C) 2009 Slava Pestov.
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! See http://factorcode.org/license.txt for BSD license.
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USING: compiler.cfg.linearization compiler.cfg.two-operand
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compiler.cfg.gc-checks compiler.cfg.linear-scan
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compiler.cfg.build-stack-frame compiler.cfg.rpo ;
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USING: compiler.cfg.linearization compiler.cfg.gc-checks
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compiler.cfg.linear-scan compiler.cfg.build-stack-frame
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compiler.cfg.rpo ;
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IN: compiler.cfg.mr
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: build-mr ( cfg -- mr )
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convert-two-operand
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insert-gc-checks
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linear-scan
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flatten-cfg
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@ -11,6 +11,7 @@ compiler.cfg.value-numbering
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compiler.cfg.copy-prop
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compiler.cfg.dce
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compiler.cfg.write-barrier
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compiler.cfg.two-operand
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compiler.cfg.ssa.destruction
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compiler.cfg.empty-blocks
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compiler.cfg.predecessors
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@ -42,6 +43,7 @@ SYMBOL: check-optimizer?
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copy-propagation
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eliminate-dead-code
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eliminate-write-barriers
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convert-two-operand
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destruct-ssa
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delete-empty-blocks
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?check
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@ -58,9 +58,13 @@ SYMBOL: copies
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GENERIC: prepare-insn ( insn -- )
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M: ##copy prepare-insn
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: prepare-copy ( insn -- )
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[ dst>> ] [ src>> ] bi 2array copies get push ;
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M: ##copy prepare-insn prepare-copy ;
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M: ##copy-float prepare-insn prepare-copy ;
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M: ##phi prepare-insn
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[ dst>> ] [ inputs>> values ] bi
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[ eliminate-copy ] with each ;
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@ -81,8 +85,10 @@ M: insn prepare-insn drop ;
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[ 2drop ] [ eliminate-copy ] if
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] assoc-each ;
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UNION: copy-insn ##copy ##copy-float ;
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: useless-copy? ( ##copy -- ? )
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dup ##copy? [ [ dst>> ] [ src>> ] bi eq? ] [ drop f ] if ;
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dup copy-insn? [ [ dst>> ] [ src>> ] bi eq? ] [ drop f ] if ;
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: perform-renaming ( cfg -- )
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leader-map get keys [ dup leader ] H{ } map>assoc renamings set
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@ -95,13 +101,11 @@ M: insn prepare-insn drop ;
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] each-basic-block ;
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: destruct-ssa ( cfg -- cfg' )
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dup cfg-has-phis? [
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dup construct-cssa
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dup compute-defs
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dup compute-dominance
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compute-ssa-live-sets
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dup compute-live-ranges
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dup prepare-coalescing
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process-copies
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dup perform-renaming
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] when ;
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dup construct-cssa
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dup compute-defs
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dup compute-dominance
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compute-ssa-live-sets
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dup compute-live-ranges
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dup prepare-coalescing
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process-copies
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dup perform-renaming ;
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@ -6,6 +6,11 @@ compiler.cfg.def-use compiler.cfg.dominance
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compiler.cfg.ssa.interference.live-ranges ;
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IN: compiler.cfg.ssa.interference
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! Interference testing using SSA properties. Actually the only SSA property
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! used here is that definitions dominate uses; because of this, the input
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! is allowed to have multiple definitions of each vreg as long as they're
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! all in the same basic block. This is needed because two-operand conversion
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! runs before coalescing, which uses SSA interference testing.
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<PRIVATE
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:: kill-after-def? ( vreg1 vreg2 bb -- ? )
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@ -47,9 +52,10 @@ PRIVATE>
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[ 2drop 2drop f ]
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} cond ;
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! Debug this stuff later
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<PRIVATE
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! Debug this stuff later
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: quadratic-test? ( seq1 seq2 -- ? ) [ length ] bi@ + 10 < ;
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: quadratic-test ( seq1 seq2 -- ? )
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|
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@ -11,8 +11,13 @@ IN: compiler.cfg.ssa.interference.live-ranges
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SYMBOLS: local-def-indices local-kill-indices ;
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: record-def ( n vregs -- )
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dup [ local-def-indices get set-at ] [ 2drop ] if ;
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: record-def ( n vreg -- )
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! We allow multiple defs of a vreg as long as they're
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! all in the same basic block
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dup [
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local-def-indices get 2dup key?
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[ 3drop ] [ set-at ] if
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] [ 2drop ] if ;
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: record-uses ( n vregs -- )
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local-kill-indices get '[ _ set-at ] with each ;
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|
|
|
@ -14,25 +14,3 @@ compiler.cfg.registers cpu.architecture namespaces tools.test ;
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T{ ##sub f V int-regs 1 V int-regs 2 V int-regs 3 }
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} (convert-two-operand)
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] unit-test
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[
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V{
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T{ ##sub f V int-regs 1 V int-regs 1 V int-regs 2 }
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}
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] [
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{
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T{ ##sub f V int-regs 1 V int-regs 1 V int-regs 2 }
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} (convert-two-operand)
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] unit-test
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[
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V{
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T{ ##copy f V int-regs 4 V int-regs 1 }
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T{ ##copy f V int-regs 1 V int-regs 2 }
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T{ ##sub f V int-regs 1 V int-regs 1 V int-regs 4 }
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}
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] [
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{
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T{ ##sub f V int-regs 1 V int-regs 2 V int-regs 1 }
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} (convert-two-operand)
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] unit-test
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|
|
|
@ -5,27 +5,17 @@ compiler.cfg.registers compiler.cfg.instructions
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compiler.cfg.rpo cpu.architecture ;
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IN: compiler.cfg.two-operand
|
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! This pass runs after SSA coalescing and normalizes instructions
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! to fit the x86 two-address scheme. Possibilities are:
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! 1) x = x op y
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! 2) x = y op x
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! 3) x = y op z
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! In case 1, there is nothing to do.
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! In case 2, we convert to
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! z = y
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! z = z op x
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! x = z
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! In case 3, we convert to
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! This pass runs before SSA coalescing and normalizes instructions
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! to fit the x86 two-address scheme. Since the input is in SSA,
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! it suffices to convert
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!
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! x = y op z
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!
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! to
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!
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! x = y
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! x = x op z
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|
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! In case 2 and case 3, linear scan coalescing will eliminate a
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! copy if the value y is never used again.
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!
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! We don't bother with ##add, ##add-imm, ##sub-imm or ##mul-imm
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! since x86 has LEA and IMUL instructions which are effectively
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! three-operand addition and multiplication, respectively.
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|
@ -59,37 +49,15 @@ GENERIC: convert-two-operand* ( insn -- )
|
|||
{ double-float-regs [ ##copy-float ] }
|
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} case ; inline
|
||||
|
||||
: case-1? ( insn -- ? ) [ dst>> ] [ src1>> ] bi = ; inline
|
||||
|
||||
: case-1 ( insn -- ) , ; inline
|
||||
|
||||
: case-2? ( insn -- ? ) [ dst>> ] [ src2>> ] bi = ; inline
|
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|
||||
: case-2 ( insn -- )
|
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dup dst>> reg-class>> next-vreg
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[ swap src2>> emit-copy ]
|
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[ drop [ src2>> ] [ src1>> ] bi emit-copy ]
|
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[ >>src2 dup dst>> >>src1 , ]
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2tri ; inline
|
||||
|
||||
: case-3 ( insn -- )
|
||||
M: two-operand-insn convert-two-operand*
|
||||
[ [ dst>> ] [ src1>> ] bi emit-copy ]
|
||||
[ dup dst>> >>src1 , ]
|
||||
bi ; inline
|
||||
|
||||
M: two-operand-insn convert-two-operand*
|
||||
{
|
||||
{ [ dup case-1? ] [ case-1 ] }
|
||||
{ [ dup case-2? ] [ case-2 ] }
|
||||
[ case-3 ]
|
||||
} cond ; inline
|
||||
bi ;
|
||||
|
||||
M: ##not convert-two-operand*
|
||||
dup [ dst>> ] [ src>> ] bi = [
|
||||
[ [ dst>> ] [ src>> ] bi ##copy ]
|
||||
[ dup dst>> >>src ]
|
||||
bi
|
||||
] unless , ;
|
||||
[ [ dst>> ] [ src>> ] bi emit-copy ]
|
||||
[ dup dst>> >>src , ]
|
||||
bi ;
|
||||
|
||||
M: insn convert-two-operand* , ;
|
||||
|
||||
|
|
Loading…
Reference in New Issue