Register allocation now uses SSA properties to coalesce values with different representations
Slava Pestov
parent
9b34a4a054
commit
43f269e4eb
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@ -10,5 +10,4 @@ IN: compiler.cfg.finalization
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insert-gc-checks
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insert-save-contexts
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destruct-ssa
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delete-empty-blocks
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linear-scan ;
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@ -129,9 +129,11 @@ SYMBOL: unhandled-sync-points
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SYMBOL: spill-slots
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: assign-spill-slot ( coalesced-vreg rep -- spill-slot )
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dup tagged-rep? [ drop int-rep ] when
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spill-slots get [ nip next-spill-slot ] 2cache ;
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: lookup-spill-slot ( coalesced-vreg rep -- spill-slot )
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dup tagged-rep? [ drop int-rep ] when
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2array spill-slots get ?at [ ] [ bad-vreg ] if ;
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: init-allocator ( registers -- )
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@ -6,8 +6,10 @@ cpu.architecture layouts
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compiler.cfg
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compiler.cfg.def-use
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compiler.cfg.liveness
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compiler.cfg.liveness.ssa
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compiler.cfg.registers
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compiler.cfg.instructions
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compiler.cfg.ssa.destruction
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compiler.cfg.renaming.functor
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compiler.cfg.linearization.order
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compiler.cfg.linear-scan.allocation
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@ -29,23 +31,16 @@ SYMBOL: pending-interval-assoc
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: remove-pending ( live-interval -- )
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vreg>> pending-interval-assoc get delete-at ;
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ERROR: bad-vreg vreg ;
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:: (vreg>reg) ( vreg pending -- reg )
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:: vreg>reg ( vreg -- reg )
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! If a live vreg is not in the pending set, then it must
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! have been spilled.
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vreg pending at* [
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drop vreg vreg rep-of lookup-spill-slot
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vreg leader :> leader
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leader pending-interval-assoc get at* [
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drop leader vreg rep-of lookup-spill-slot
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] unless ;
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: vreg>reg ( vreg -- reg )
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pending-interval-assoc get (vreg>reg) ;
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: vregs>regs ( vregs -- assoc )
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dup assoc-empty? [
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pending-interval-assoc get
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'[ _ (vreg>reg) ] assoc-map
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] unless ;
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[ f ] [ [ dup vreg>reg ] H{ } map>assoc ] if-empty ;
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! Minheap of live intervals which still need a register allocation
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SYMBOL: unhandled-intervals
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@ -56,18 +51,45 @@ SYMBOL: unhandled-intervals
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: init-unhandled ( live-intervals -- )
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[ add-unhandled ] each ;
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! Liveness info is used by resolve pass
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! Mapping from basic blocks to values which are live at the start
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SYMBOL: register-live-ins
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! on all incoming CFG edges
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SYMBOL: machine-live-ins
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: machine-live-in ( bb -- assoc )
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machine-live-ins get at ;
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: compute-live-in ( bb -- )
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[ live-in keys vregs>regs ] keep machine-live-ins get set-at ;
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! Mapping from basic blocks to predecessors to values which are
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! live on a particular incoming edge
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SYMBOL: machine-edge-live-ins
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: machine-edge-live-in ( predecessor bb -- assoc )
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machine-edge-live-ins get at at ;
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: compute-edge-live-in ( bb -- )
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[ edge-live-ins get at [ keys vregs>regs ] assoc-map ] keep
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machine-edge-live-ins get set-at ;
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! Mapping from basic blocks to values which are live at the end
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SYMBOL: register-live-outs
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SYMBOL: machine-live-outs
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: machine-live-out ( bb -- assoc )
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machine-live-outs get at ;
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: compute-live-out ( bb -- )
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[ live-out keys vregs>regs ] keep machine-live-outs get set-at ;
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: init-assignment ( live-intervals -- )
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<min-heap> pending-interval-heap set
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H{ } clone pending-interval-assoc set
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<min-heap> unhandled-intervals set
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H{ } clone register-live-ins set
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H{ } clone register-live-outs set
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H{ } clone machine-live-ins set
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H{ } clone machine-edge-live-ins set
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H{ } clone machine-live-outs set
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init-unhandled ;
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: insert-spill ( live-interval -- )
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@ -135,18 +157,12 @@ M: ##call-gc assign-registers-in-insn
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M: insn assign-registers-in-insn drop ;
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: begin-block ( bb -- )
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dup basic-block set
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dup block-from activate-new-intervals
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[ live-in vregs>regs ] keep register-live-ins get set-at ;
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: end-block ( bb -- )
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[ live-out vregs>regs ] keep register-live-outs get set-at ;
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: vreg-at-start ( vreg bb -- state )
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register-live-ins get at ?at [ bad-vreg ] unless ;
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: vreg-at-end ( vreg bb -- state )
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register-live-outs get at ?at [ bad-vreg ] unless ;
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{
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[ basic-block set ]
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[ block-from activate-new-intervals ]
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[ compute-edge-live-in ]
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[ compute-live-in ]
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} cleave ;
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:: assign-registers-in-block ( bb -- )
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bb [
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@ -160,7 +176,7 @@ M: insn assign-registers-in-insn drop ;
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[ , ]
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} cleave
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] each
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bb end-block
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bb compute-live-out
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] V{ } make
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] change-instructions drop ;
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@ -1,10 +1,9 @@
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! Copyright (C) 2008, 2009 Slava Pestov.
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! Copyright (C) 2008, 2010 Slava Pestov.
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! See http://factorcode.org/license.txt for BSD license.
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USING: kernel accessors namespaces make locals
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cpu.architecture
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compiler.cfg
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compiler.cfg.rpo
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compiler.cfg.liveness
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compiler.cfg.registers
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compiler.cfg.instructions
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compiler.cfg.linear-scan.numbering
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@ -29,8 +28,9 @@ IN: compiler.cfg.linear-scan
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! by Omri Traub, Glenn Holloway, Michael D. Smith
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! http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.34.8435
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! SSA liveness must have been computed already
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:: (linear-scan) ( cfg machine-registers -- )
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cfg compute-live-sets
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cfg number-instructions
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cfg compute-live-intervals machine-registers allocate-registers
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cfg assign-registers
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@ -2,9 +2,12 @@
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! See http://factorcode.org/license.txt for BSD license.
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USING: namespaces kernel assocs accessors locals sequences math
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math.order fry combinators binary-search
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compiler.cfg.instructions compiler.cfg.registers
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compiler.cfg.def-use compiler.cfg.liveness
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compiler.cfg.instructions
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compiler.cfg.registers
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compiler.cfg.def-use
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compiler.cfg.liveness
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compiler.cfg.linearization.order
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compiler.cfg.ssa.destruction
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compiler.cfg
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cpu.architecture ;
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IN: compiler.cfg.linear-scan.live-intervals
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@ -43,7 +46,7 @@ M: live-interval covers? ( insn# live-interval -- ? )
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[ drop ] [ [ from>> <=> ] with search nip ] 2bi
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covers?
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] if ;
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: add-new-range ( from to live-interval -- )
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[ <live-range> ] dip ranges>> push ;
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@ -87,27 +90,28 @@ SYMBOLS: from to ;
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SYMBOL: live-intervals
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: live-interval ( vreg -- live-interval )
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live-intervals get [ dup rep-of reg-class-of <live-interval> ] cache ;
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leader live-intervals get
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[ dup rep-of reg-class-of <live-interval> ] cache ;
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GENERIC: compute-live-intervals* ( insn -- )
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M: insn compute-live-intervals* drop ;
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:: handle-output ( vreg n type -- )
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:: record-def ( vreg n type -- )
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vreg rep-of :> rep
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vreg live-interval :> live-interval
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n live-interval shorten-range
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rep n type live-interval add-use ;
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:: handle-input ( vreg n type -- )
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:: record-use ( vreg n type -- )
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vreg rep-of :> rep
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vreg live-interval :> live-interval
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from get n live-interval add-range
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rep n type live-interval add-use ;
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:: handle-temp ( vreg n -- )
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:: record-temp ( vreg n -- )
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vreg rep-of :> rep
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vreg live-interval :> live-interval
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@ -117,16 +121,16 @@ M: insn compute-live-intervals* drop ;
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M:: vreg-insn compute-live-intervals* ( insn -- )
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insn insn#>> :> n
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insn defs-vreg [ n +def+ handle-output ] when*
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insn uses-vregs [ n +use+ handle-input ] each
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insn temp-vregs [ n handle-temp ] each ;
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insn defs-vreg [ n +def+ record-def ] when*
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insn uses-vregs [ n +use+ record-use ] each
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insn temp-vregs [ n record-temp ] each ;
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M:: clobber-insn compute-live-intervals* ( insn -- )
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insn insn#>> :> n
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insn defs-vreg [ n +use+ handle-output ] when*
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insn uses-vregs [ n +memory+ handle-input ] each
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insn temp-vregs [ n handle-temp ] each ;
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insn defs-vreg [ n +use+ record-def ] when*
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insn uses-vregs [ n +memory+ record-use ] each
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insn temp-vregs [ n record-temp ] each ;
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: handle-live-out ( bb -- )
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live-out dup assoc-empty? [ drop ] [
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@ -12,6 +12,7 @@ compiler.cfg.utilities
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compiler.cfg.instructions
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compiler.cfg.predecessors
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compiler.cfg.parallel-copy
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compiler.cfg.ssa.destruction
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compiler.cfg.linear-scan.assignment
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compiler.cfg.linear-scan.allocation.state ;
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IN: compiler.cfg.linear-scan.resolve
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@ -40,14 +41,22 @@ SYMBOL: spill-temps
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: add-mapping ( from to rep -- )
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'[ _ <location> ] bi@ 2array , ;
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:: resolve-value-data-flow ( bb to vreg -- )
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vreg bb vreg-at-end
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vreg to vreg-at-start
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:: resolve-value-data-flow ( vreg live-out live-in edge-live-in -- )
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vreg live-out ?at [ bad-vreg ] unless
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vreg live-in ?at [ edge-live-in ?at [ bad-vreg ] unless ] unless
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2dup = [ 2drop ] [ vreg rep-of add-mapping ] if ;
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: compute-mappings ( bb to -- mappings )
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dup live-in dup assoc-empty? [ 3drop f ] [
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[ keys [ resolve-value-data-flow ] with with each ] { } make
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:: compute-mappings ( bb to -- mappings )
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bb machine-live-out :> live-out
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to machine-live-in :> live-in
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bb to machine-edge-live-in :> edge-live-in
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live-out assoc-empty? [ f ] [
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[
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live-in keys edge-live-in keys append [
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live-out live-in edge-live-in
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resolve-value-data-flow
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] each
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] { } make
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] if ;
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: memory->register ( from to -- )
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@ -0,0 +1,65 @@
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USING: accessors compiler.cfg compiler.cfg.debugger
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compiler.cfg.instructions compiler.cfg.liveness.ssa
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compiler.cfg.liveness arrays sequences assocs
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compiler.cfg.registers kernel namespaces tools.test ;
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IN: compiler.cfg.liveness.ssa.tests
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V{
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T{ ##prologue }
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T{ ##branch }
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} 0 test-bb
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V{
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T{ ##branch }
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} 1 test-bb
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V{
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T{ ##load-integer f 0 0 }
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T{ ##branch }
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} 2 test-bb
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V{
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T{ ##load-integer f 1 1 }
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T{ ##branch }
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} 3 test-bb
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V{
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T{ ##phi f 2 }
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T{ ##branch }
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} 4 test-bb
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2 get 0 2array
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3 get 1 2array 2array
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4 get instructions>> first (>>inputs)
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V{
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T{ ##branch }
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} 5 test-bb
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V{
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T{ ##replace f 2 D 0 }
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T{ ##branch }
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} 6 test-bb
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V{
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T{ ##epilogue }
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T{ ##return }
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} 7 test-bb
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0 1 edge
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1 { 2 3 } edges
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2 4 edge
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3 4 edge
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4 { 5 6 } edges
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5 6 edge
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6 7 edge
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[ ] [ cfg new 0 get >>entry dup cfg set compute-ssa-live-sets ] unit-test
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[ t ] [ 0 get live-in assoc-empty? ] unit-test
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[ H{ { 2 2 } } ] [ 4 get live-out ] unit-test
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[ H{ { 0 0 } } ] [ 2 get 4 get edge-live-in ] unit-test
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[ H{ { 1 1 } } ] [ 3 get 4 get edge-live-in ] unit-test
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@ -11,9 +11,9 @@ IN: compiler.cfg.liveness.ssa
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! Assoc mapping basic blocks to sequences of sets of vregs; each sequence
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! is in correspondence with a predecessor
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SYMBOL: phi-live-ins
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SYMBOL: edge-live-ins
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: phi-live-in ( predecessor basic-block -- set ) phi-live-ins get at at ;
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: edge-live-in ( predecessor basic-block -- set ) edge-live-ins get at at ;
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SYMBOL: work-list
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@ -23,19 +23,19 @@ SYMBOL: work-list
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: compute-live-in ( basic-block -- live-in )
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[ live-out ] keep instructions>> transfer-liveness ;
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: compute-phi-live-in ( basic-block -- phi-live-in )
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: compute-edge-live-in ( basic-block -- edge-live-in )
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H{ } clone [
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'[ inputs>> [ swap _ conjoin-at ] assoc-each ] each-phi
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] keep ;
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: update-live-in ( basic-block -- changed? )
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[ [ compute-live-in ] keep live-ins get maybe-set-at ]
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[ [ compute-phi-live-in ] keep phi-live-ins get maybe-set-at ]
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[ [ compute-edge-live-in ] keep edge-live-ins get maybe-set-at ]
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bi or ;
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: compute-live-out ( basic-block -- live-out )
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[ successors>> [ live-in ] map ]
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[ dup successors>> [ phi-live-in ] with map ] bi
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[ dup successors>> [ edge-live-in ] with map ] bi
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append assoc-combine ;
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: update-live-out ( basic-block -- changed? )
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@ -53,7 +53,7 @@ SYMBOL: work-list
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<hashed-dlist> work-list set
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H{ } clone live-ins set
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H{ } clone phi-live-ins set
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H{ } clone edge-live-ins set
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H{ } clone live-outs set
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post-order add-to-work-list
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work-list get [ liveness-step ] slurp-deque ;
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@ -3,9 +3,9 @@
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USING: accessors arrays assocs fry kernel namespaces
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sequences sequences.deep
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sets vectors
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cpu.architecture
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compiler.cfg.rpo
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compiler.cfg.def-use
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compiler.cfg.renaming
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compiler.cfg.registers
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compiler.cfg.dominance
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compiler.cfg.instructions
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@ -18,27 +18,38 @@ compiler.utilities ;
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FROM: namespaces => set ;
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IN: compiler.cfg.ssa.destruction
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! Maps vregs to leaders.
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! Because of the design of the register allocator, this pass
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! has three peculiar properties.
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!
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! 1) Instead of renaming vreg usages in the CFG, a map from
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! vregs to canonical representatives is computed. This allows
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! the register allocator to use the original SSA names to get
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! reaching definitions.
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! 2) Useless ##copy instructions, and all ##phi instructions,
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! are eliminated, so the register allocator does not have to
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! remove any redundant operations.
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! 3) A side effect of running this pass is that SSA liveness
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! information is computed, so the register allocator does not
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! need to compute it again.
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SYMBOL: leader-map
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: leader ( vreg -- vreg' ) leader-map get compress-path ;
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! Maps basic blocks to ##phi instruction outputs
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SYMBOL: phi-sets
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: phi-set ( bb -- vregs ) phi-sets get at ;
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! Maps leaders to equivalence class elements.
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SYMBOL: class-element-map
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: class-elements ( vreg -- elts ) class-element-map get at ;
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<PRIVATE
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! Sequence of vreg pairs
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SYMBOL: copies
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: init-coalescing ( -- )
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H{ } clone leader-map set
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H{ } clone class-element-map set
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defs get keys
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[ [ dup ] H{ } map>assoc leader-map set ]
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[ [ dup 1vector ] H{ } map>assoc class-element-map set ] bi
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V{ } clone copies set ;
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: classes-interfere? ( vreg1 vreg2 -- ? )
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@ -61,25 +72,27 @@ SYMBOL: copies
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2bi
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] if ;
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: introduce-vreg ( vreg -- )
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[ leader-map get conjoin ]
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[ [ 1vector ] keep class-element-map get set-at ] bi ;
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|
||||
GENERIC: prepare-insn ( insn -- )
|
||||
|
||||
: try-to-coalesce ( dst src -- ) 2array copies get push ;
|
||||
|
||||
M: insn prepare-insn
|
||||
[ defs-vreg ] [ uses-vregs ] bi
|
||||
2dup empty? not and [
|
||||
first
|
||||
2dup [ rep-of ] bi@ eq?
|
||||
[ try-to-coalesce ] [ 2drop ] if
|
||||
] [ 2drop ] if ;
|
||||
[ temp-vregs [ leader-map get conjoin ] each ]
|
||||
[
|
||||
[ defs-vreg ] [ uses-vregs ] bi
|
||||
2dup empty? not and [
|
||||
first
|
||||
2dup [ rep-of ] bi@ eq?
|
||||
[ try-to-coalesce ] [ 2drop ] if
|
||||
] [ 2drop ] if
|
||||
] bi ;
|
||||
|
||||
M: ##copy prepare-insn
|
||||
[ dst>> ] [ src>> ] bi try-to-coalesce ;
|
||||
|
||||
M: ##tagged>integer prepare-insn
|
||||
[ dst>> ] [ src>> ] bi eliminate-copy ;
|
||||
|
||||
M: ##phi prepare-insn
|
||||
[ dst>> ] [ inputs>> values ] bi
|
||||
[ eliminate-copy ] with each ;
|
||||
|
|
@ -89,7 +102,6 @@ M: ##phi prepare-insn
|
|||
|
||||
: prepare-coalescing ( cfg -- )
|
||||
init-coalescing
|
||||
defs get keys [ introduce-vreg ] each
|
||||
[ prepare-block ] each-basic-block ;
|
||||
|
||||
: process-copies ( -- )
|
||||
|
|
@ -98,34 +110,26 @@ M: ##phi prepare-insn
|
|||
[ 2drop ] [ eliminate-copy ] if
|
||||
] assoc-each ;
|
||||
|
||||
GENERIC: rename-insn ( insn -- keep? )
|
||||
GENERIC: useful-insn? ( insn -- ? )
|
||||
|
||||
M: vreg-insn rename-insn
|
||||
[ rename-insn-defs ] [ rename-insn-uses ] bi t ;
|
||||
: useful-copy? ( insn -- ? )
|
||||
[ dst>> leader ] [ src>> leader ] bi eq? not ; inline
|
||||
|
||||
M: ##copy rename-insn
|
||||
[ call-next-method drop ]
|
||||
[ [ dst>> ] [ src>> ] bi eq? not ] bi ;
|
||||
M: ##copy useful-insn? useful-copy? ;
|
||||
|
||||
SYMBOL: current-phi-set
|
||||
M: ##tagged>integer useful-insn? useful-copy? ;
|
||||
|
||||
M: ##phi rename-insn dst>> current-phi-set get push f ;
|
||||
M: ##phi useful-insn? drop f ;
|
||||
|
||||
M: ##call-gc rename-insn
|
||||
[ renamings get '[ _ at ] map members ] change-gc-roots drop t ;
|
||||
M: insn useful-insn? drop t ;
|
||||
|
||||
M: insn rename-insn drop t ;
|
||||
: cleanup-block ( bb -- )
|
||||
instructions>> [ useful-insn? ] filter! drop ;
|
||||
|
||||
: renaming-in-block ( bb -- )
|
||||
V{ } clone current-phi-set set
|
||||
[ [ current-phi-set ] dip phi-sets get set-at ]
|
||||
[ instructions>> [ rename-insn ] filter! drop ]
|
||||
bi ;
|
||||
: cleanup-cfg ( cfg -- )
|
||||
[ cleanup-block ] each-basic-block ;
|
||||
|
||||
: perform-renaming ( cfg -- )
|
||||
H{ } clone phi-sets set
|
||||
leader-map get keys [ dup leader ] H{ } map>assoc renamings set
|
||||
[ renaming-in-block ] each-basic-block ;
|
||||
PRIVATE>
|
||||
|
||||
: destruct-ssa ( cfg -- cfg' )
|
||||
needs-dominance
|
||||
|
|
@ -136,4 +140,4 @@ M: insn rename-insn drop t ;
|
|||
dup compute-live-ranges
|
||||
dup prepare-coalescing
|
||||
process-copies
|
||||
dup perform-renaming ;
|
||||
dup cleanup-cfg ;
|
||||
|
|
|
|||
|
|
@ -346,8 +346,7 @@ M: x86.32 %cleanup ( params -- )
|
|||
|
||||
M:: x86.32 %call-gc ( gc-roots -- )
|
||||
4 save-vm-ptr
|
||||
EAX gc-roots gc-root-offsets %load-reference
|
||||
0 stack@ EAX MOV
|
||||
0 stack@ gc-roots gc-root-offsets %load-reference
|
||||
"inline_gc" f %alien-invoke ;
|
||||
|
||||
M: x86.32 dummy-stack-params? f ;
|
||||
|
|
|
|||
Loading…
Reference in New Issue