From 43fc230c69493023e297a55746141f18edbd4372 Mon Sep 17 00:00:00 2001
From: Slava Pestov <slava@slava-pestovs-macbook-pro.local>
Date: Wed, 28 Apr 2010 03:35:46 -0400
Subject: [PATCH] compiler.cfg.linear-scan: cleanups

---
 .../build-stack-frame.factor                  |  2 +-
 .../cfg/instructions/instructions.factor      | 29 +++----
 .../linear-scan/allocation/allocation.factor  |  4 +-
 .../allocation/spilling/spilling.factor       | 14 ++--
 .../linear-scan/allocation/state/state.factor | 20 ++---
 .../linear-scan/assignment/assignment.factor  | 10 ++-
 .../cfg/linear-scan/linear-scan-tests.factor  | 82 ++++++++++++++-----
 .../live-intervals/live-intervals.factor      | 10 ++-
 .../linear-scan/resolve/resolve-tests.factor  | 24 +++---
 .../cfg/linear-scan/resolve/resolve.factor    |  8 +-
 basis/compiler/codegen/codegen.factor         |  5 +-
 11 files changed, 128 insertions(+), 80 deletions(-)

diff --git a/basis/compiler/cfg/build-stack-frame/build-stack-frame.factor b/basis/compiler/cfg/build-stack-frame/build-stack-frame.factor
index cb5e9aaf3d..49dfb95164 100644
--- a/basis/compiler/cfg/build-stack-frame/build-stack-frame.factor
+++ b/basis/compiler/cfg/build-stack-frame/build-stack-frame.factor
@@ -39,7 +39,7 @@ M: insn compute-stack-frame*
     ] when ;
 
 ! PowerPC backend sets frame-required? for ##integer>float!
-\ _spill t frame-required? set-word-prop
+\ ##spill t frame-required? set-word-prop
 \ ##unary-float-function t frame-required? set-word-prop
 \ ##binary-float-function t frame-required? set-word-prop
 
diff --git a/basis/compiler/cfg/instructions/instructions.factor b/basis/compiler/cfg/instructions/instructions.factor
index db1496f147..5286fd861b 100644
--- a/basis/compiler/cfg/instructions/instructions.factor
+++ b/basis/compiler/cfg/instructions/instructions.factor
@@ -706,7 +706,22 @@ temp: temp1/int-rep temp2/int-rep ;
 INSN: ##call-gc
 literal: gc-roots ;
 
+! Spills and reloads, inserted by register allocator
+TUPLE: spill-slot { n integer } ;
+C: <spill-slot> spill-slot
+
+INSN: ##spill
+use: src
+literal: rep dst ;
+
+INSN: ##reload
+def: dst
+literal: rep src ;
+
 ! Instructions used by machine IR only.
+INSN: _spill-area-size
+literal: n ;
+
 INSN: _prologue
 literal: stack-frame ;
 
@@ -727,20 +742,6 @@ literal: label ;
 INSN: _conditional-branch
 literal: label insn ;
 
-TUPLE: spill-slot { n integer } ;
-C: <spill-slot> spill-slot
-
-INSN: _spill
-use: src
-literal: rep dst ;
-
-INSN: _reload
-def: dst
-literal: rep src ;
-
-INSN: _spill-area-size
-literal: n ;
-
 UNION: ##allocation
 ##allot
 ##box-alien
diff --git a/basis/compiler/cfg/linear-scan/allocation/allocation.factor b/basis/compiler/cfg/linear-scan/allocation/allocation.factor
index 764e37786f..ed7690bd77 100644
--- a/basis/compiler/cfg/linear-scan/allocation/allocation.factor
+++ b/basis/compiler/cfg/linear-scan/allocation/allocation.factor
@@ -9,11 +9,11 @@ compiler.cfg.linear-scan.allocation.state ;
 IN: compiler.cfg.linear-scan.allocation
 
 : active-positions ( new assoc -- )
-    [ vreg>> active-intervals-for ] dip
+    [ active-intervals-for ] dip
     '[ [ 0 ] dip reg>> _ add-use-position ] each ;
 
 : inactive-positions ( new assoc -- )
-    [ [ vreg>> inactive-intervals-for ] keep ] dip
+    [ [ inactive-intervals-for ] keep ] dip
     '[
         [ _ relevant-ranges intersect-live-ranges 1/0. or ] [ reg>> ] bi
         _ add-use-position
diff --git a/basis/compiler/cfg/linear-scan/allocation/spilling/spilling.factor b/basis/compiler/cfg/linear-scan/allocation/spilling/spilling.factor
index a914aab4bf..fdba952d4a 100644
--- a/basis/compiler/cfg/linear-scan/allocation/spilling/spilling.factor
+++ b/basis/compiler/cfg/linear-scan/allocation/spilling/spilling.factor
@@ -17,13 +17,13 @@ ERROR: bad-live-ranges interval ;
     ] [ drop ] if ;
 
 : trim-before-ranges ( live-interval -- )
-    [ ranges>> ] [ uses>> last n>> 1 + ] bi
+    [ ranges>> ] [ last-use n>> 1 + ] bi
     [ '[ from>> _ <= ] filter! drop ]
     [ swap last (>>to) ]
     2bi ;
 
 : trim-after-ranges ( live-interval -- )
-    [ ranges>> ] [ uses>> first n>> ] bi
+    [ ranges>> ] [ first-use n>> ] bi
     [ '[ to>> _ >= ] filter! drop ]
     [ swap first (>>from) ]
     2bi ;
@@ -73,12 +73,12 @@ ERROR: bad-live-ranges interval ;
     '[ [ _ find-use-position ] [ reg>> ] bi _ add-use-position ] each ;
 
 : active-positions ( new assoc -- )
-    [ [ vreg>> active-intervals-for ] keep ] dip
+    [ [ active-intervals-for ] keep ] dip
     find-use-positions ;
 
 : inactive-positions ( new assoc -- )
     [
-        [ vreg>> inactive-intervals-for ] keep
+        [ inactive-intervals-for ] keep
         [ '[ _ intervals-intersect? ] filter ] keep
     ] dip
     find-use-positions ;
@@ -89,7 +89,7 @@ ERROR: bad-live-ranges interval ;
     >alist alist-max ;
 
 : spill-new? ( new pair -- ? )
-    [ uses>> first n>> ] [ second ] bi* > ;
+    [ first-use n>> ] [ second ] bi* > ;
 
 : spill-new ( new pair -- )
     drop spill-after add-unhandled ;
@@ -103,13 +103,13 @@ ERROR: bad-live-ranges interval ;
     ! If there is an active interval using 'reg' (there should be at
     ! most one) are split and spilled and removed from the inactive
     ! set.
-    new vreg>> active-intervals-for [ [ reg>> reg = ] find swap dup ] keep
+    new active-intervals-for [ [ reg>> reg = ] find swap dup ] keep
     '[ _ remove-nth! drop  new start>> spill ] [ 2drop ] if ;
 
 :: spill-intersecting-inactive ( new reg -- )
     ! Any inactive intervals using 'reg' are split and spilled
     ! and removed from the inactive set.
-    new vreg>> inactive-intervals-for [
+    new inactive-intervals-for [
         dup reg>> reg = [
             dup new intervals-intersect? [
                 new start>> spill f
diff --git a/basis/compiler/cfg/linear-scan/allocation/state/state.factor b/basis/compiler/cfg/linear-scan/allocation/state/state.factor
index 4c825c9d7c..06365b0ed2 100644
--- a/basis/compiler/cfg/linear-scan/allocation/state/state.factor
+++ b/basis/compiler/cfg/linear-scan/allocation/state/state.factor
@@ -26,14 +26,14 @@ SYMBOL: registers
 ! Vector of active live intervals
 SYMBOL: active-intervals
 
-: active-intervals-for ( vreg -- seq )
-    rep-of reg-class-of active-intervals get at ;
+: active-intervals-for ( live-interval -- seq )
+    reg-class>> active-intervals get at ;
 
 : add-active ( live-interval -- )
-    dup vreg>> active-intervals-for push ;
+    dup active-intervals-for push ;
 
 : delete-active ( live-interval -- )
-    dup vreg>> active-intervals-for remove-eq! drop ;
+    dup active-intervals-for remove-eq! drop ;
 
 : assign-free-register ( new registers -- )
     pop >>reg add-active ;
@@ -41,14 +41,14 @@ SYMBOL: active-intervals
 ! Vector of inactive live intervals
 SYMBOL: inactive-intervals
 
-: inactive-intervals-for ( vreg -- seq )
-    rep-of reg-class-of inactive-intervals get at ;
+: inactive-intervals-for ( live-interval -- seq )
+    reg-class>> inactive-intervals get at ;
 
 : add-inactive ( live-interval -- )
-    dup vreg>> inactive-intervals-for push ;
+    dup inactive-intervals-for push ;
 
 : delete-inactive ( live-interval -- )
-    dup vreg>> inactive-intervals-for remove-eq! drop ;
+    dup inactive-intervals-for remove-eq! drop ;
 
 ! Vector of handled live intervals
 SYMBOL: handled-intervals
@@ -67,7 +67,7 @@ ERROR: register-already-used live-interval ;
 
 : check-activate ( live-interval -- )
     check-allocation? get [
-        dup [ reg>> ] [ vreg>> active-intervals-for [ reg>> ] map ] bi member?
+        dup [ reg>> ] [ active-intervals-for [ reg>> ] map ] bi member?
         [ register-already-used ] [ drop ] if
     ] [ drop ] if ;
 
@@ -148,7 +148,7 @@ SYMBOL: spill-slots
 
 ! A utility used by register-status and spill-status words
 : free-positions ( new -- assoc )
-    vreg>> rep-of reg-class-of registers get at
+    reg-class>> registers get at
     [ 1/0. ] H{ } <linked-assoc> map>assoc ;
 
 : add-use-position ( n reg assoc -- ) [ [ min ] when* ] change-at ;
diff --git a/basis/compiler/cfg/linear-scan/assignment/assignment.factor b/basis/compiler/cfg/linear-scan/assignment/assignment.factor
index 6cceea3303..7c0f38a44e 100644
--- a/basis/compiler/cfg/linear-scan/assignment/assignment.factor
+++ b/basis/compiler/cfg/linear-scan/assignment/assignment.factor
@@ -68,8 +68,10 @@ SYMBOL: register-live-outs
     H{ } clone register-live-outs set
     init-unhandled ;
 
+: spill-rep ( live-interval -- rep ) vreg>> rep-of ;
+
 : insert-spill ( live-interval -- )
-    [ reg>> ] [ vreg>> rep-of ] [ spill-to>> ] tri _spill ;
+    [ reg>> ] [ spill-rep ] [ spill-to>> ] tri ##spill ;
 
 : handle-spill ( live-interval -- )
     dup spill-to>> [ insert-spill ] [ drop ] if ;
@@ -88,15 +90,17 @@ SYMBOL: register-live-outs
 : expire-old-intervals ( n -- )
     pending-interval-heap get (expire-old-intervals) ;
 
+: reload-rep ( live-interval -- rep ) vreg>> rep-of ;
+
 : insert-reload ( live-interval -- )
-    [ reg>> ] [ vreg>> rep-of ] [ reload-from>> ] tri _reload ;
+    [ reg>> ] [ reload-rep ] [ reload-from>> ] tri ##reload ;
 
 : insert-reload? ( live-interval -- ? )
     ! Don't insert a reload if the register will be written to
     ! before being read again.
     {
         [ reload-from>> ]
-        [ uses>> first type>> +use+ eq? ]
+        [ first-use type>> +use+ eq? ]
     } 1&& ;
 
 : handle-reload ( live-interval -- )
diff --git a/basis/compiler/cfg/linear-scan/linear-scan-tests.factor b/basis/compiler/cfg/linear-scan/linear-scan-tests.factor
index 3bf7dd827c..a0f6b9f5c5 100644
--- a/basis/compiler/cfg/linear-scan/linear-scan-tests.factor
+++ b/basis/compiler/cfg/linear-scan/linear-scan-tests.factor
@@ -89,6 +89,7 @@ H{
 [
     T{ live-interval
        { vreg 1 }
+       { reg-class float-regs }
        { start 0 }
        { end 2 }
        { uses V{ T{ vreg-use f 0 } T{ vreg-use f 1 } } }
@@ -97,6 +98,7 @@ H{
     }
     T{ live-interval
        { vreg 1 }
+       { reg-class float-regs }
        { start 5 }
        { end 5 }
        { uses V{ T{ vreg-use f 5 } } }
@@ -106,6 +108,7 @@ H{
 ] [
     T{ live-interval
        { vreg 1 }
+       { reg-class float-regs }
        { start 0 }
        { end 5 }
        { uses V{ T{ vreg-use f 0 } T{ vreg-use f 1 } T{ vreg-use f 5 } } }
@@ -116,6 +119,7 @@ H{
 [
     T{ live-interval
        { vreg 2 }
+       { reg-class float-regs }
        { start 0 }
        { end 1 }
        { uses V{ T{ vreg-use f 0 } } }
@@ -124,6 +128,7 @@ H{
     }
     T{ live-interval
        { vreg 2 }
+       { reg-class float-regs }
        { start 1 }
        { end 5 }
        { uses V{ T{ vreg-use f 1 } T{ vreg-use f 5 } } }
@@ -133,6 +138,7 @@ H{
 ] [
     T{ live-interval
        { vreg 2 }
+       { reg-class float-regs }
        { start 0 }
        { end 5 }
        { uses V{ T{ vreg-use f 0 } T{ vreg-use f 1 } T{ vreg-use f 5 } } }
@@ -143,6 +149,7 @@ H{
 [
     T{ live-interval
        { vreg 3 }
+       { reg-class float-regs }
        { start 0 }
        { end 1 }
        { uses V{ T{ vreg-use f 0 } } }
@@ -151,6 +158,7 @@ H{
     }
     T{ live-interval
        { vreg 3 }
+       { reg-class float-regs }
        { start 20 }
        { end 30 }
        { uses V{ T{ vreg-use f 20 } T{ vreg-use f 30 } } }
@@ -160,6 +168,7 @@ H{
 ] [
     T{ live-interval
        { vreg 3 }
+       { reg-class float-regs }
        { start 0 }
        { end 30 }
        { uses V{ T{ vreg-use f 0 } T{ vreg-use f 20 } T{ vreg-use f 30 } } }
@@ -184,6 +193,7 @@ H{
           V{
               T{ live-interval
                  { vreg 1 }
+                 { reg-class int-regs }
                  { reg 1 }
                  { start 1 }
                  { end 15 }
@@ -191,6 +201,7 @@ H{
               }
               T{ live-interval
                  { vreg 2 }
+                 { reg-class int-regs }
                  { reg 2 }
                  { start 3 }
                  { end 8 }
@@ -198,6 +209,7 @@ H{
               }
               T{ live-interval
                  { vreg 3 }
+                 { reg-class int-regs }
                  { reg 3 }
                  { start 3 }
                  { end 10 }
@@ -209,6 +221,7 @@ H{
     H{ } inactive-intervals set
     T{ live-interval
         { vreg 1 }
+        { reg-class int-regs }
         { start 5 }
         { end 5 }
         { uses V{ T{ vreg-use f 5 } } }
@@ -227,6 +240,7 @@ H{
           V{
               T{ live-interval
                  { vreg 1 }
+                 { reg-class int-regs }
                  { reg 1 }
                  { start 1 }
                  { end 15 }
@@ -234,6 +248,7 @@ H{
               }
               T{ live-interval
                  { vreg 2 }
+                 { reg-class int-regs }
                  { reg 2 }
                  { start 3 }
                  { end 8 }
@@ -245,6 +260,7 @@ H{
     H{ } inactive-intervals set
     T{ live-interval
         { vreg 3 }
+        { reg-class int-regs }
         { start 5 }
         { end 5 }
         { uses V{ T{ vreg-use f 5 } } }
@@ -258,6 +274,7 @@ H{ { 1 int-rep } { 2 int-rep } } representations set
     {
         T{ live-interval
            { vreg 1 }
+           { reg-class int-regs }
            { start 0 }
            { end 100 }
            { uses V{ T{ vreg-use f 0 } T{ vreg-use f 100 } } }
@@ -272,6 +289,7 @@ H{ { 1 int-rep } { 2 int-rep } } representations set
     {
         T{ live-interval
            { vreg 1 }
+           { reg-class int-regs }
            { start 0 }
            { end 10 }
            { uses V{ T{ vreg-use f 0 } T{ vreg-use f 10 } } }
@@ -279,6 +297,7 @@ H{ { 1 int-rep } { 2 int-rep } } representations set
         }
         T{ live-interval
            { vreg 2 }
+           { reg-class int-regs }
            { start 11 }
            { end 20 }
            { uses V{ T{ vreg-use f 11 } T{ vreg-use f 20 } } }
@@ -293,6 +312,7 @@ H{ { 1 int-rep } { 2 int-rep } } representations set
     {
         T{ live-interval
            { vreg 1 }
+           { reg-class int-regs }
            { start 0 }
            { end 100 }
            { uses V{ T{ vreg-use f 0 } T{ vreg-use f 100 } } }
@@ -300,6 +320,7 @@ H{ { 1 int-rep } { 2 int-rep } } representations set
         }
         T{ live-interval
            { vreg 2 }
+           { reg-class int-regs }
            { start 30 }
            { end 60 }
            { uses V{ T{ vreg-use f 30 } T{ vreg-use f 60 } } }
@@ -314,6 +335,7 @@ H{ { 1 int-rep } { 2 int-rep } } representations set
     {
         T{ live-interval
            { vreg 1 }
+           { reg-class int-regs }
            { start 0 }
            { end 100 }
            { uses V{ T{ vreg-use f 0 } T{ vreg-use f 100 } } }
@@ -321,6 +343,7 @@ H{ { 1 int-rep } { 2 int-rep } } representations set
         }
         T{ live-interval
            { vreg 2 }
+           { reg-class int-regs }
            { start 30 }
            { end 200 }
            { uses V{ T{ vreg-use f 30 } T{ vreg-use f 200 } } }
@@ -335,6 +358,7 @@ H{ { 1 int-rep } { 2 int-rep } } representations set
     {
         T{ live-interval
            { vreg 1 }
+           { reg-class int-regs }
            { start 0 }
            { end 100 }
            { uses V{ T{ vreg-use f 0 } T{ vreg-use f 100 } } }
@@ -342,6 +366,7 @@ H{ { 1 int-rep } { 2 int-rep } } representations set
         }
         T{ live-interval
            { vreg 2 }
+           { reg-class int-regs }
            { start 30 }
            { end 100 }
            { uses V{ T{ vreg-use f 30 } T{ vreg-use f 100 } } }
@@ -365,6 +390,7 @@ H{
     {
         T{ live-interval
            { vreg 1 }
+           { reg-class int-regs }
            { start 0 }
            { end 20 }
            { uses V{ T{ vreg-use f 0 } T{ vreg-use f 10 } T{ vreg-use f 20 } } }
@@ -372,6 +398,7 @@ H{
         }
         T{ live-interval
            { vreg 2 }
+           { reg-class int-regs }
            { start 0 }
            { end 20 }
            { uses V{ T{ vreg-use f 0 } T{ vreg-use f 10 } T{ vreg-use f 20 } } }
@@ -379,6 +406,7 @@ H{
         }
         T{ live-interval
            { vreg 3 }
+           { reg-class int-regs }
            { start 4 }
            { end 8 }
            { uses V{ T{ vreg-use f 6 } } }
@@ -386,6 +414,7 @@ H{
         }
         T{ live-interval
            { vreg 4 }
+           { reg-class int-regs }
            { start 4 }
            { end 8 }
            { uses V{ T{ vreg-use f 8 } } }
@@ -395,6 +424,7 @@ H{
         ! This guy will invoke the 'spill partially available' code path
         T{ live-interval
            { vreg 5 }
+           { reg-class int-regs }
            { start 4 }
            { end 8 }
            { uses V{ T{ vreg-use f 8 } } }
@@ -411,6 +441,7 @@ H{
     {
         T{ live-interval
            { vreg 1 }
+           { reg-class int-regs }
            { start 0 }
            { end 10 }
            { uses V{ T{ vreg-use f 0 } T{ vreg-use f 6 } T{ vreg-use f 10 } } }
@@ -420,6 +451,7 @@ H{
         ! This guy will invoke the 'spill new' code path
         T{ live-interval
            { vreg 5 }
+           { reg-class int-regs }
            { start 2 }
            { end 8 }
            { uses V{ T{ vreg-use f 8 } } }
@@ -491,12 +523,14 @@ H{
 [ 5 ] [
     T{ live-interval
        { start 0 }
+       { reg-class int-regs }
        { end 10 }
        { uses { 0 10 } }
        { ranges V{ T{ live-range f 0 10 } } }
     }
     T{ live-interval
        { start 5 }
+       { reg-class int-regs }
        { end 10 }
        { uses { 5 10 } }
        { ranges V{ T{ live-range f 5 10 } } }
@@ -520,6 +554,7 @@ H{
           {
               T{ live-interval
                  { vreg 1 }
+                 { reg-class int-regs }
                  { start 0 }
                  { end 20 }
                  { reg 0 }
@@ -529,6 +564,7 @@ H{
 
               T{ live-interval
                  { vreg 2 }
+                 { reg-class int-regs }
                  { start 4 }
                  { end 40 }
                  { reg 0 }
@@ -543,6 +579,7 @@ H{
           {
               T{ live-interval
                  { vreg 3 }
+                 { reg-class int-regs }
                  { start 0 }
                  { end 40 }
                  { reg 1 }
@@ -554,7 +591,8 @@ H{
     } active-intervals set
 
     T{ live-interval
-       { vreg 4 }
+        { vreg 4 }
+        { reg-class int-regs }
         { start 8 }
         { end 10 }
         { ranges V{ T{ live-range f 8 10 } } }
@@ -924,13 +962,13 @@ test-diamond
 
 [ ] [ { 1 2 } test-linear-scan-on-cfg ] unit-test
 
-[ _spill ] [ 2 get successors>> first instructions>> first class ] unit-test
+[ ##spill ] [ 2 get successors>> first instructions>> first class ] unit-test
 
-[ _spill ] [ 3 get instructions>> second class ] unit-test
+[ ##spill ] [ 3 get instructions>> second class ] unit-test
 
-[ f ] [ 3 get instructions>> [ _reload? ] any? ] unit-test
+[ f ] [ 3 get instructions>> [ ##reload? ] any? ] unit-test
 
-[ _reload ] [ 4 get instructions>> first class ] unit-test
+[ ##reload ] [ 4 get instructions>> first class ] unit-test
 
 ! Resolve pass
 V{
@@ -978,11 +1016,11 @@ V{
 
 [ ] [ { 1 2 } test-linear-scan-on-cfg ] unit-test
 
-[ t ] [ 2 get instructions>> [ _spill? ] any? ] unit-test
+[ t ] [ 2 get instructions>> [ ##spill? ] any? ] unit-test
 
-[ t ] [ 3 get predecessors>> first instructions>> [ _spill? ] any? ] unit-test
+[ t ] [ 3 get predecessors>> first instructions>> [ ##spill? ] any? ] unit-test
 
-[ t ] [ 5 get instructions>> [ _reload? ] any? ] unit-test
+[ t ] [ 5 get instructions>> [ ##reload? ] any? ] unit-test
 
 ! A more complicated failure case with resolve that came up after the above
 ! got fixed
@@ -1041,13 +1079,13 @@ V{
 
 [ ] [ { 1 2 3 4 } test-linear-scan-on-cfg ] unit-test
 
-[ _spill ] [ 1 get instructions>> second class ] unit-test
-[ _reload ] [ 4 get instructions>> 4 swap nth class ] unit-test
-[ V{ 3 2 1 } ] [ 8 get instructions>> [ _spill? ] filter [ dst>> n>> cell / ] map ] unit-test
-[ V{ 3 2 1 } ] [ 9 get instructions>> [ _reload? ] filter [ src>> n>> cell / ] map ] unit-test
+[ ##spill ] [ 1 get instructions>> second class ] unit-test
+[ ##reload ] [ 4 get instructions>> 4 swap nth class ] unit-test
+[ V{ 3 2 1 } ] [ 8 get instructions>> [ ##spill? ] filter [ dst>> n>> cell / ] map ] unit-test
+[ V{ 3 2 1 } ] [ 9 get instructions>> [ ##reload? ] filter [ src>> n>> cell / ] map ] unit-test
 
 ! Resolve pass should insert this
-[ _reload ] [ 5 get predecessors>> first instructions>> first class ] unit-test
+[ ##reload ] [ 5 get predecessors>> first instructions>> first class ] unit-test
 
 ! Some random bug
 V{
@@ -1397,13 +1435,13 @@ test-diamond
 
 [ ] [ { 1 2 } test-linear-scan-on-cfg ] unit-test
 
-[ 0 ] [ 1 get instructions>> [ _spill? ] count ] unit-test
+[ 0 ] [ 1 get instructions>> [ ##spill? ] count ] unit-test
 
-[ 1 ] [ 2 get instructions>> [ _spill? ] count ] unit-test
+[ 1 ] [ 2 get instructions>> [ ##spill? ] count ] unit-test
 
-[ 1 ] [ 3 get predecessors>> first instructions>> [ _spill? ] count ] unit-test
+[ 1 ] [ 3 get predecessors>> first instructions>> [ ##spill? ] count ] unit-test
 
-[ 1 ] [ 4 get instructions>> [ _reload? ] count ] unit-test
+[ 1 ] [ 4 get instructions>> [ ##reload? ] count ] unit-test
 
 ! Another test case for fencepost error in assignment pass
 V{ T{ ##branch } } 0 test-bb
@@ -1435,12 +1473,12 @@ test-diamond
 
 [ ] [ { 1 2 } test-linear-scan-on-cfg ] unit-test
 
-[ 0 ] [ 1 get instructions>> [ _spill? ] count ] unit-test
+[ 0 ] [ 1 get instructions>> [ ##spill? ] count ] unit-test
 
-[ 1 ] [ 2 get instructions>> [ _spill? ] count ] unit-test
+[ 1 ] [ 2 get instructions>> [ ##spill? ] count ] unit-test
 
-[ 1 ] [ 2 get instructions>> [ _reload? ] count ] unit-test
+[ 1 ] [ 2 get instructions>> [ ##reload? ] count ] unit-test
 
-[ 0 ] [ 3 get instructions>> [ _spill? ] count ] unit-test
+[ 0 ] [ 3 get instructions>> [ ##spill? ] count ] unit-test
 
-[ 0 ] [ 4 get instructions>> [ _reload? ] count ] unit-test
+[ 0 ] [ 4 get instructions>> [ ##reload? ] count ] unit-test
diff --git a/basis/compiler/cfg/linear-scan/live-intervals/live-intervals.factor b/basis/compiler/cfg/linear-scan/live-intervals/live-intervals.factor
index da079da0e4..62b23ddde9 100644
--- a/basis/compiler/cfg/linear-scan/live-intervals/live-intervals.factor
+++ b/basis/compiler/cfg/linear-scan/live-intervals/live-intervals.factor
@@ -3,7 +3,7 @@
 USING: namespaces kernel assocs accessors sequences math math.order fry
 combinators binary-search compiler.cfg.instructions compiler.cfg.registers
 compiler.cfg.def-use compiler.cfg.liveness compiler.cfg.linearization.order
-compiler.cfg ;
+compiler.cfg cpu.architecture ;
 IN: compiler.cfg.linear-scan.live-intervals
 
 TUPLE: live-range from to ;
@@ -19,7 +19,12 @@ C: <vreg-use> vreg-use
 TUPLE: live-interval
 vreg
 reg spill-to reload-from
-start end ranges uses ;
+start end ranges uses
+reg-class ;
+
+: first-use ( live-interval -- use ) uses>> first ; inline
+
+: last-use ( live-interval -- use ) uses>> last ; inline
 
 GENERIC: covers? ( insn# obj -- ? )
 
@@ -66,6 +71,7 @@ M: live-interval covers? ( insn# live-interval -- ? )
     \ live-interval new
         V{ } clone >>uses
         V{ } clone >>ranges
+        over rep-of reg-class-of >>reg-class
         swap >>vreg ;
 
 : block-from ( bb -- n ) instructions>> first insn#>> 1 - ;
diff --git a/basis/compiler/cfg/linear-scan/resolve/resolve-tests.factor b/basis/compiler/cfg/linear-scan/resolve/resolve-tests.factor
index f16c608293..7aff066e0b 100644
--- a/basis/compiler/cfg/linear-scan/resolve/resolve-tests.factor
+++ b/basis/compiler/cfg/linear-scan/resolve/resolve-tests.factor
@@ -20,7 +20,7 @@ IN: compiler.cfg.linear-scan.resolve.tests
 
 [
     {
-        T{ _reload { dst 1 } { rep int-rep } { src T{ spill-slot f 0 } } }
+        T{ ##reload { dst 1 } { rep int-rep } { src T{ spill-slot f 0 } } }
     }
 ] [
     [
@@ -32,7 +32,7 @@ IN: compiler.cfg.linear-scan.resolve.tests
 
 [
     {
-        T{ _spill { src 1 } { rep int-rep } { dst T{ spill-slot f 0 } } }
+        T{ ##spill { src 1 } { rep int-rep } { dst T{ spill-slot f 0 } } }
     }
 ] [
     [
@@ -66,8 +66,8 @@ IN: compiler.cfg.linear-scan.resolve.tests
 
 [
     {
-        T{ _spill { src 0 } { rep int-rep } { dst T{ spill-slot f 0 } } }
-        T{ _reload { dst 0 } { rep tagged-rep } { src T{ spill-slot f 1 } } }
+        T{ ##spill { src 0 } { rep int-rep } { dst T{ spill-slot f 0 } } }
+        T{ ##reload { dst 0 } { rep tagged-rep } { src T{ spill-slot f 1 } } }
         T{ ##branch }
     }
 ] [
@@ -80,8 +80,8 @@ IN: compiler.cfg.linear-scan.resolve.tests
 
 [
     {
-        T{ _spill { src 0 } { rep int-rep } { dst T{ spill-slot f 1 } } }
-        T{ _reload { dst 0 } { rep tagged-rep } { src T{ spill-slot f 0 } } }
+        T{ ##spill { src 0 } { rep int-rep } { dst T{ spill-slot f 1 } } }
+        T{ ##reload { dst 0 } { rep tagged-rep } { src T{ spill-slot f 0 } } }
         T{ ##branch }
     }
 ] [
@@ -94,8 +94,8 @@ IN: compiler.cfg.linear-scan.resolve.tests
 
 [
     {
-        T{ _spill { src 0 } { rep int-rep } { dst T{ spill-slot f 1 } } }
-        T{ _reload { dst 0 } { rep tagged-rep } { src T{ spill-slot f 0 } } }
+        T{ ##spill { src 0 } { rep int-rep } { dst T{ spill-slot f 1 } } }
+        T{ ##reload { dst 0 } { rep tagged-rep } { src T{ spill-slot f 0 } } }
         T{ ##branch }
     }
 ] [
@@ -116,15 +116,15 @@ H{ } clone spill-temps set
     }
     mapping-instructions {
         {
-            T{ _spill { src 0 } { rep int-rep } { dst T{ spill-slot f 8 } } }
+            T{ ##spill { src 0 } { rep int-rep } { dst T{ spill-slot f 8 } } }
             T{ ##copy { dst 0 } { src 1 } { rep int-rep } }
-            T{ _reload { dst 1 } { rep int-rep } { src T{ spill-slot f 8 } } }
+            T{ ##reload { dst 1 } { rep int-rep } { src T{ spill-slot f 8 } } }
             T{ ##branch }
         }
         {
-            T{ _spill { src 1 } { rep int-rep } { dst T{ spill-slot f 8 } } }
+            T{ ##spill { src 1 } { rep int-rep } { dst T{ spill-slot f 8 } } }
             T{ ##copy { dst 1 } { src 0 } { rep int-rep } }
-            T{ _reload { dst 0 } { rep int-rep } { src T{ spill-slot f 8 } } }
+            T{ ##reload { dst 0 } { rep int-rep } { src T{ spill-slot f 8 } } }
             T{ ##branch }
         }
     } member?
diff --git a/basis/compiler/cfg/linear-scan/resolve/resolve.factor b/basis/compiler/cfg/linear-scan/resolve/resolve.factor
index b450145bd4..02c08d5c39 100644
--- a/basis/compiler/cfg/linear-scan/resolve/resolve.factor
+++ b/basis/compiler/cfg/linear-scan/resolve/resolve.factor
@@ -51,16 +51,16 @@ SYMBOL: spill-temps
     ] if ;
 
 : memory->register ( from to -- )
-    swap [ reg>> ] [ [ rep>> ] [ reg>> ] bi ] bi* _reload ;
+    swap [ reg>> ] [ [ rep>> ] [ reg>> ] bi ] bi* ##reload ;
 
 : register->memory ( from to -- )
-    [ [ reg>> ] [ rep>> ] bi ] [ reg>> ] bi* _spill ;
+    [ [ reg>> ] [ rep>> ] bi ] [ reg>> ] bi* ##spill ;
 
 : temp->register ( from to -- )
-    nip [ reg>> ] [ rep>> ] [ rep>> spill-temp ] tri _reload ;
+    nip [ reg>> ] [ rep>> ] [ rep>> spill-temp ] tri ##reload ;
 
 : register->temp ( from to -- )
-    drop [ [ reg>> ] [ rep>> ] bi ] [ rep>> spill-temp ] bi _spill ;
+    drop [ [ reg>> ] [ rep>> ] bi ] [ rep>> spill-temp ] bi ##spill ;
 
 : register->register ( from to -- )
     swap [ reg>> ] [ [ reg>> ] [ rep>> ] bi ] bi* ##copy ;
diff --git a/basis/compiler/codegen/codegen.factor b/basis/compiler/codegen/codegen.factor
index 3a101092b2..2d0cfa8289 100755
--- a/basis/compiler/codegen/codegen.factor
+++ b/basis/compiler/codegen/codegen.factor
@@ -200,7 +200,8 @@ CODEGEN: ##vm-field %vm-field
 CODEGEN: ##set-vm-field %set-vm-field
 CODEGEN: ##alien-global %alien-global
 CODEGEN: ##call-gc %call-gc
-
+CODEGEN: ##spill %spill
+CODEGEN: ##reload %reload
 CODEGEN: ##dispatch %dispatch
 
 : %dispatch-label ( label -- )
@@ -210,8 +211,6 @@ CODEGEN: ##dispatch %dispatch
 CODEGEN: _label resolve-label
 CODEGEN: _dispatch-label %dispatch-label
 CODEGEN: _branch %jump-label
-CODEGEN: _spill %spill
-CODEGEN: _reload %reload
 CODEGEN: _loop-entry %loop-entry
 
 GENERIC: generate-conditional-insn ( label insn -- )