From 4e024cbbc25d56edaae64a72e1e4fca6ec0c6a48 Mon Sep 17 00:00:00 2001
From: Joe Groff <arcata@gmail.com>
Date: Fri, 2 Oct 2009 23:19:56 -0500
Subject: [PATCH] extend x86 %compare-vector to cover all comparison codes,
 sometimes stupidly for now

---
 .../cfg/instructions/instructions.factor      |  2 +
 basis/cpu/architecture/architecture.factor    |  2 +-
 basis/cpu/x86/x86.factor                      | 56 +++++++++++++++----
 3 files changed, 48 insertions(+), 12 deletions(-)

diff --git a/basis/compiler/cfg/instructions/instructions.factor b/basis/compiler/cfg/instructions/instructions.factor
index ffbda6b09e..a4ebde304e 100644
--- a/basis/compiler/cfg/instructions/instructions.factor
+++ b/basis/compiler/cfg/instructions/instructions.factor
@@ -283,6 +283,7 @@ literal: shuffle rep ;
 PURE-INSN: ##compare-vector
 def: dst
 use: src1 src2
+temp: temp
 literal: rep cc ;
 
 PURE-INSN: ##test-vector
@@ -774,6 +775,7 @@ UNION: kill-vreg-insn
 UNION: def-is-use-insn
 ##box-alien
 ##box-displaced-alien
+##compare-vector
 ##not-vector
 ##string-nth
 ##unbox-any-c-ptr ;
diff --git a/basis/cpu/architecture/architecture.factor b/basis/cpu/architecture/architecture.factor
index eb54f06ce5..30ec0c8968 100644
--- a/basis/cpu/architecture/architecture.factor
+++ b/basis/cpu/architecture/architecture.factor
@@ -218,7 +218,7 @@ HOOK: %fill-vector cpu ( dst rep -- )
 HOOK: %gather-vector-2 cpu ( dst src1 src2 rep -- )
 HOOK: %gather-vector-4 cpu ( dst src1 src2 src3 src4 rep -- )
 HOOK: %shuffle-vector cpu ( dst src shuffle rep -- )
-HOOK: %compare-vector cpu ( dst src1 src2 rep cc -- )
+HOOK: %compare-vector cpu ( dst src1 src2 temp rep cc -- )
 HOOK: %test-vector cpu ( dst src1 temp rep vcc -- )
 HOOK: %test-vector-branch cpu ( label src1 temp rep vcc -- )
 HOOK: %add-vector cpu ( dst src1 src2 rep -- )
diff --git a/basis/cpu/x86/x86.factor b/basis/cpu/x86/x86.factor
index 243e794834..631a428b84 100644
--- a/basis/cpu/x86/x86.factor
+++ b/basis/cpu/x86/x86.factor
@@ -721,20 +721,54 @@ M: x86 %shuffle-vector-reps
         { sse2? { double-2-rep int-4-rep uint-4-rep longlong-2-rep ulonglong-2-rep } }
     } available-reps ;
 
-: %compare-vector-equal ( dst src rep -- )
-    unsign-rep {
-        { double-2-rep   [ CMPEQPD ] }
-        { float-4-rep    [ CMPEQPS ] }
-        { longlong-2-rep [ PCMPEQQ ] }
-        { int-4-rep      [ PCMPEQD ] }
-        { short-8-rep    [ PCMPEQW ] }
-        { char-16-rep    [ PCMPEQB ] }
+:: compare-float-v-operands ( dst src1 src2 temp rep cc -- dst' src' rep cc' )
+    cc { cc> cc>= cc/> cc/>= } member?
+    [ dst src2 src1 rep two-operand rep cc swap-cc ]
+    [ dst src1 src2 rep two-operand rep cc         ] if ;
+: (%compare-float-vector) ( dst src rep double single -- )
+    [ double-2-rep eq? ] 2dip if ; inline
+: %compare-float-vector ( dst src1 src2 temp rep cc -- )
+    compare-float-v-operands {
+        { cc<    [ [ CMPLTPD    ] [ CMPLTPS    ] (%compare-float-vector) ] }
+        { cc<=   [ [ CMPLEPD    ] [ CMPLEPS    ] (%compare-float-vector) ] }
+        { cc=    [ [ CMPEQPD    ] [ CMPEQPS    ] (%compare-float-vector) ] }
+        { cc<>=  [ [ CMPORDPD   ] [ CMPORDPS   ] (%compare-float-vector) ] }
+        { cc/<   [ [ CMPNLTPD   ] [ CMPNLTPS   ] (%compare-float-vector) ] }
+        { cc/<=  [ [ CMPNLEPD   ] [ CMPNLEPS   ] (%compare-float-vector) ] }
+        { cc/=   [ [ CMPNEQPD   ] [ CMPNEQPS   ] (%compare-float-vector) ] }
+        { cc/<>= [ [ CMPUNORDPD ] [ CMPUNORDPS ] (%compare-float-vector) ] }
     } case ;
 
-M: x86 %compare-vector ( dst src1 src2 rep cc -- )
-    [ [ two-operand ] keep ] dip {
-        { cc= [ %compare-vector-equal ] }
+:: compare-int-v-operands ( dst src1 src2 temp rep cc -- not-dst/f cmp-dst src' rep cc' )
+    cc order-cc :> occ
+    occ {
+        { cc=  [ f   dst  src1 src2 rep two-operand rep cc= ] }
+        { cc/= [ dst temp src1 src2 rep two-operand rep cc= ] }
+        { cc<= [ dst temp src1 src2 rep two-operand rep cc> ] }
+        { cc<  [ f   dst  src2 src1 rep two-operand rep cc> ] }
+        { cc>  [ f   dst  src1 src2 rep two-operand rep cc> ] }
+        { cc>= [ dst temp src2 src1 rep two-operand rep cc> ] }
     } case ;
+:: (%compare-int-vector) ( dst src rep int64 int32 int16 int8 -- )
+    rep unsign-rep :> rep'
+    dst src rep' {
+        { longlong-2-rep [ int64 call ] }
+        { int-4-rep      [ int32 call ] }
+        { short-8-rep    [ int16 call ] }
+        { char-16-rep    [ int8  call ] }
+    } case ; inline
+:: %compare-int-vector ( dst src1 src2 temp rep cc -- )
+    dst src1 src2 temp rep cc compare-int-v-operands :> cc' :> rep :> src' :> cmp-dst :> not-dst
+    cmp-dst src' rep cc' {
+        { cc= [ [ PCMPEQQ ] [ PCMPEQD ] [ PCMPEQW ] [ PCMPEQB ] (%compare-int-vector) ] }
+        { cc> [ [ PCMPGTQ ] [ PCMPGTD ] [ PCMPGTW ] [ PCMPGTB ] (%compare-int-vector) ] }
+    } case
+    not-dst [ cmp-dst rep %not-vector ] when* ;
+
+M: x86 %compare-vector ( dst src1 src2 temp rep cc -- )
+    over float-vector-rep?
+    [ %compare-float-vector ]
+    [ %compare-int-vector ] if ;
 
 M: x86 %compare-vector-reps
     {