Merge branch 'master' of git://factorcode.org/git/factor
commit
59c1f3f73e
|
@ -814,7 +814,6 @@ UNION: def-is-use-insn
|
|||
##box-alien
|
||||
##box-displaced-alien
|
||||
##compare-vector
|
||||
##not-vector
|
||||
##string-nth
|
||||
##unbox-any-c-ptr ;
|
||||
|
||||
|
|
|
@ -171,12 +171,12 @@ IN: compiler.cfg.intrinsics
|
|||
{ math.vectors.simd.intrinsics:(simd-vbitandn) [ [ ^^andn-vector ] emit-binary-vector-op ] }
|
||||
{ math.vectors.simd.intrinsics:(simd-vbitor) [ [ ^^or-vector ] emit-binary-vector-op ] }
|
||||
{ math.vectors.simd.intrinsics:(simd-vbitxor) [ [ ^^xor-vector ] emit-binary-vector-op ] }
|
||||
{ math.vectors.simd.intrinsics:(simd-vbitnot) [ [ ^^not-vector ] emit-unary-vector-op ] }
|
||||
{ math.vectors.simd.intrinsics:(simd-vbitnot) [ [ generate-not-vector ] emit-unary-vector-op ] }
|
||||
{ math.vectors.simd.intrinsics:(simd-vand) [ [ ^^and-vector ] emit-binary-vector-op ] }
|
||||
{ math.vectors.simd.intrinsics:(simd-vandn) [ [ ^^andn-vector ] emit-binary-vector-op ] }
|
||||
{ math.vectors.simd.intrinsics:(simd-vor) [ [ ^^or-vector ] emit-binary-vector-op ] }
|
||||
{ math.vectors.simd.intrinsics:(simd-vxor) [ [ ^^xor-vector ] emit-binary-vector-op ] }
|
||||
{ math.vectors.simd.intrinsics:(simd-vnot) [ [ ^^not-vector ] emit-unary-vector-op ] }
|
||||
{ math.vectors.simd.intrinsics:(simd-vnot) [ [ generate-not-vector ] emit-unary-vector-op ] }
|
||||
{ math.vectors.simd.intrinsics:(simd-v<=) [ [ cc<= ^^compare-vector ] emit-binary-vector-op ] }
|
||||
{ math.vectors.simd.intrinsics:(simd-v<) [ [ cc< ^^compare-vector ] emit-binary-vector-op ] }
|
||||
{ math.vectors.simd.intrinsics:(simd-v=) [ [ cc= ^^compare-vector ] emit-binary-vector-op ] }
|
||||
|
|
|
@ -115,3 +115,9 @@ MACRO: if-literals-match ( quots -- )
|
|||
[ byte-array inline-alien-setter? ]
|
||||
inline-alien
|
||||
] with emit-vector-op ;
|
||||
|
||||
: generate-not-vector ( src rep -- dst )
|
||||
dup %not-vector-reps member?
|
||||
[ ^^not-vector ]
|
||||
[ [ ^^fill-vector ] [ ^^xor-vector ] bi ] if ;
|
||||
|
||||
|
|
|
@ -160,6 +160,7 @@ CODEGEN: ##double>single-float %double>single-float
|
|||
CODEGEN: ##integer>float %integer>float
|
||||
CODEGEN: ##float>integer %float>integer
|
||||
CODEGEN: ##zero-vector %zero-vector
|
||||
CODEGEN: ##fill-vector %fill-vector
|
||||
CODEGEN: ##gather-vector-2 %gather-vector-2
|
||||
CODEGEN: ##gather-vector-4 %gather-vector-4
|
||||
CODEGEN: ##shuffle-vector %shuffle-vector
|
||||
|
|
|
@ -770,8 +770,8 @@ M: x86 %unsigned-pack-vector
|
|||
|
||||
M: x86 %unsigned-pack-vector-reps
|
||||
{
|
||||
{ sse2? { ushort-8-rep short-8-rep } }
|
||||
{ sse4.1? { uint-4-rep int-4-rep } }
|
||||
{ sse2? { short-8-rep } }
|
||||
{ sse4.1? { int-4-rep } }
|
||||
} available-reps ;
|
||||
|
||||
:: %sign-extension-vector ( dst src rep -- )
|
||||
|
@ -869,13 +869,16 @@ M: x86 %float>integer-vector-reps
|
|||
{ short-8-rep [ int16 call ] }
|
||||
{ char-16-rep [ int8 call ] }
|
||||
} case ; inline
|
||||
:: (%not-vector) ( dst src rep -- )
|
||||
dst rep %fill-vector
|
||||
dst dst src rep %xor-vector ;
|
||||
:: %compare-int-vector ( dst src1 src2 temp rep cc -- )
|
||||
dst src1 src2 temp rep cc compare-int-v-operands :> cc' :> rep :> src' :> cmp-dst :> not-dst
|
||||
cmp-dst src' rep cc' {
|
||||
{ cc= [ [ PCMPEQQ ] [ PCMPEQD ] [ PCMPEQW ] [ PCMPEQB ] (%compare-int-vector) ] }
|
||||
{ cc> [ [ PCMPGTQ ] [ PCMPGTD ] [ PCMPGTW ] [ PCMPGTB ] (%compare-int-vector) ] }
|
||||
} case
|
||||
not-dst [ cmp-dst rep %not-vector ] when* ;
|
||||
not-dst [ cmp-dst rep (%not-vector) ] when* ;
|
||||
|
||||
M: x86 %compare-vector ( dst src1 src2 temp rep cc -- )
|
||||
over float-vector-rep?
|
||||
|
@ -1230,15 +1233,7 @@ M: x86 %xor-vector-reps
|
|||
{ sse2? { double-2-rep char-16-rep uchar-16-rep short-8-rep ushort-8-rep int-4-rep uint-4-rep longlong-2-rep ulonglong-2-rep } }
|
||||
} available-reps ;
|
||||
|
||||
M:: x86 %not-vector ( dst src rep -- )
|
||||
dst rep %fill-vector
|
||||
dst dst src rep %xor-vector ;
|
||||
|
||||
M: x86 %not-vector-reps
|
||||
{
|
||||
{ sse? { float-4-rep } }
|
||||
{ sse2? { double-2-rep char-16-rep uchar-16-rep short-8-rep ushort-8-rep int-4-rep uint-4-rep longlong-2-rep ulonglong-2-rep } }
|
||||
} available-reps ;
|
||||
M: x86 %not-vector-reps { } ;
|
||||
|
||||
M: x86 %shl-vector ( dst src1 src2 rep -- )
|
||||
[ two-operand ] keep
|
||||
|
|
|
@ -157,12 +157,12 @@ M: vector-rep supported-simd-op?
|
|||
{ \ (simd-vbitandn) [ %andn-vector-reps ] }
|
||||
{ \ (simd-vbitor) [ %or-vector-reps ] }
|
||||
{ \ (simd-vbitxor) [ %xor-vector-reps ] }
|
||||
{ \ (simd-vbitnot) [ %not-vector-reps ] }
|
||||
{ \ (simd-vbitnot) [ %xor-vector-reps ] }
|
||||
{ \ (simd-vand) [ %and-vector-reps ] }
|
||||
{ \ (simd-vandn) [ %andn-vector-reps ] }
|
||||
{ \ (simd-vor) [ %or-vector-reps ] }
|
||||
{ \ (simd-vxor) [ %xor-vector-reps ] }
|
||||
{ \ (simd-vnot) [ %not-vector-reps ] }
|
||||
{ \ (simd-vnot) [ %xor-vector-reps ] }
|
||||
{ \ (simd-vlshift) [ %shl-vector-reps ] }
|
||||
{ \ (simd-vrshift) [ %shr-vector-reps ] }
|
||||
{ \ (simd-hlshift) [ %horizontal-shl-vector-reps ] }
|
||||
|
|
|
@ -4,6 +4,7 @@ math.private math.vectors math.vectors.simd
|
|||
math.vectors.simd.private prettyprint random sequences system
|
||||
tools.test vocabs assocs compiler.cfg.debugger words
|
||||
locals math.vectors.specialization combinators cpu.architecture
|
||||
math.vectors.conversion.backend
|
||||
math.vectors.simd.intrinsics namespaces byte-arrays alien
|
||||
specialized-arrays classes.struct eval classes.algebra sets
|
||||
quotations math.constants compiler.units ;
|
||||
|
|
Loading…
Reference in New Issue