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compiler.cfg.*: lots of more compiler docs

db4
Björn Lindqvist 2015-06-14 08:59:03 +02:00
parent 418438ab13
commit 5ad35fabd1
14 changed files with 129 additions and 33 deletions
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15
basis/compiler/cfg/def-use/def-use-docs.factor
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@ -1,7 +1,11 @@
USING: compiler.cfg compiler.cfg.instructions help.markup help.syntax
USING: assocs compiler.cfg compiler.cfg.instructions help.markup help.syntax
sequences ;
IN: compiler.cfg.def-use
HELP: compute-defs
{ $values { "cfg" cfg } }
{ $description "Computes a mapping from vregs to " { $link basic-block } " instances in which they are defined. The data is assigned to the " { $link defs } " dynamic variable." } ;
HELP: compute-insns
{ $values { "cfg" cfg } }
{ $description "Computes a mapping from vregs to the instructions that define them and store the result in the " { $link insns } " variable. The " { $link insn-of } " word can then be used to access the assoc." } ;
@ -17,9 +21,14 @@ HELP: defs-vregs
}
} ;
HELP: insns
{ $var-description { $link assoc } " mapping vreg integers to defining instructions." }
{ $see-also compute-insns insn-of } ;
HELP: insn-of
{ $values { "vreg" "virtual register" } { "insn" insn } }
{ $description "Maps the vreg to the instruction that defined it." } ;
{ $description "Maps the vreg to the instruction that defined it." }
{ $see-also compute-insns } ;
HELP: temp-vregs
{ $values { "insn" insn } { "seq" sequence } }
@ -43,7 +52,7 @@ HELP: special-vreg-insns
ARTICLE: "compiler.cfg.def-use" "Common code used by several passes for def-use analysis"
"The " { $vocab-link "compiler.cfg.def-use" } " contains tools to correlate SSA instructions with virtual registers defined or used by them."
$nl
"Vregs for a given instruction:"
"The def-use protocol -- vregs for a given instruction:"
{ $subsections
defs-vregs
temp-vregs

1
basis/compiler/cfg/def-use/def-use.factor
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@ -11,7 +11,6 @@ IN: compiler.cfg.def-use
! Utilities for iterating over instruction operands
! Def-use protocol
GENERIC: defs-vregs ( insn -- seq )
GENERIC: temp-vregs ( insn -- seq )
GENERIC: uses-vregs ( insn -- seq )

24
basis/compiler/cfg/instructions/instructions-docs.factor
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@ -1,4 +1,5 @@
USING: alien arrays assocs classes compiler.cfg compiler.cfg.intrinsics.fixnum
compiler.cfg.linear-scan.assignment compiler.cfg.liveness
compiler.cfg.ssa.destruction compiler.cfg.value-numbering
compiler.codegen.gc-maps cpu.architecture help.markup help.syntax kernel layouts
math sequences slots.private system ;
@ -136,7 +137,12 @@ HELP: ##peek
HELP: ##phi
{ $class-description
"A special kind of instruction used to mark control flow. It is inserted by the " { $vocab-link "compiler.cfg.ssa.construction" } " vocab." } ;
"A special kind of instruction used to mark control flow. It is inserted by the " { $vocab-link "compiler.cfg.ssa.construction" } " vocab. It has the following slots:"
{ $table
{ { $slot "inputs" } { "An assoc containing as keys the blocks where the vreg was defined and as values the vreg." } }
{ { $slot "dst" } { "A merged vreg for the value." } }
}
} ;
HELP: ##prologue
{ $class-description
@ -229,6 +235,15 @@ HELP: ##vector>scalar
{ $notes "The two vregs must not necessarily share the same representation." }
{ $see-also %vector>scalar } ;
HELP: ##vm-field
{ $class-description "Instruction for loading a pointer to a vm field."
{ $table
{ { $slot "dst" } { "Register to load the field into." } }
{ { $slot "offset" } { "Offset of the field relative to the vm address." } }
}
}
{ $see-also %vm-field } ;
HELP: ##write-barrier
{ $class-description
"An instruction for inserting a write barrier. This instruction is almost always inserted after a " { $link ##set-slot } " instruction. If the container object is in an older generation than the item inserted, this instruction guarantees that the item will not be garbage collected. It has the following slots:"
@ -278,11 +293,14 @@ HELP: gc-map-insn
HELP: gc-map
{ $class-description "A tuple that holds info necessary for a gc cycle to figure out where the gc root pointers are. It has the following slots:"
{ $table
{ { $slot "gc-roots" } { "A " { $link sequence } " of " { $link spill-slot } " which will be traced in a gc cycle. " } }
{
{ $slot "gc-roots" }
{ "First a " { $link sequence } " of vregs that will be spilled during a gc. It is assigned in the " { $vocab-link "compiler.cfg.liveness" } " compiler pass. Then it is converted to a sequence of " { $link spill-slot } "s in " { $link assign-registers } "." }
}
{ { $slot "derived-roots" } { "An " { $link assoc } " of pairs of spill slots." } }
}
}
{ $see-also emit-gc-info-bitmaps } ;
{ $see-also emit-gc-info-bitmaps fill-gc-map } ;
ARTICLE: "compiler.cfg.instructions" "Basic block instructions"
"The " { $vocab-link "compiler.cfg.instructions" } " vocab contains all instruction classes used for generating CFG:s (Call Flow Graphs)."

7
basis/compiler/cfg/intrinsics/fixnum/fixnum-docs.factor
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@ -1,6 +1,11 @@
USING: compiler.cfg.instructions help.markup help.syntax ;
USING: compiler.cfg.instructions help.markup help.syntax layouts math ;
IN: compiler.cfg.intrinsics.fixnum
HELP: fixnum*overflow
{ $values { "x" fixnum } { "y" fixnum } { "z" bignum } }
{ $description "Word called to perform a fixnum multiplication when the product overflows the value storable in " { $link cell } "." }
{ $see-also most-negative-fixnum most-positive-fixnum } ;
HELP: emit-fixnum-comparison
{ $values { "cc" "comparison symbol" } }
{ $description "Emits a " { $link ##compare-integer } " instruction to the make sequence." } ;

9
basis/compiler/cfg/linear-scan/linear-scan-docs.factor
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@ -5,6 +5,10 @@ HELP: admissible-registers
{ $values { "cfg" cfg } { "regs" assoc } }
{ $description "Lists all registers usable by the cfg by register class. In general, that's all registers except the frame pointer register that might be used by the cfg for other purposes." } ;
HELP: linear-scan
{ $values { "cfg" cfg } }
{ $description "Entry point for the linear scan register alloation pass." } ;
ARTICLE: "compiler.cfg.linear-scan" "Linear-scan register allocation"
"Linear scan to assign physical registers. SSA liveness must have been computed already."
$nl
@ -13,7 +17,8 @@ $nl
"Linear Scan Register Allocation by Massimiliano Poletto and Vivek Sarkar http://www.cs.ucla.edu/~palsberg/course/cs132/linearscan.pdf"
"Linear Scan Register Allocation for the Java HotSpot Client Compiler by Christian Wimmer and http://www.ssw.uni-linz.ac.at/Research/Papers/Wimmer04Master/"
"Quality and Speed in Linear-scan Register Allocation by Omri Traub, Glenn Holloway, Michael D. Smith http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.34.8435"
} ;
}
"Optimization pass entry point:"
{ $subsections linear-scan } ;
ABOUT: "compiler.cfg.linear-scan"

23
basis/compiler/cfg/linear-scan/live-intervals/live-intervals-docs.factor
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@ -19,6 +19,9 @@ HELP: finish-live-intervals
{ $values { "live-intervals" sequence } { "seq" sequence } }
{ $description "Since live intervals are computed in a backward order, we have to reverse some sequences, and compute the start and end." } ;
HELP: from
{ $var-description "An integer representing a sequence number one lower than all numbers in the currently processed block." } ;
HELP: live-interval-state
{ $class-description "A class encoding the \"liveness\" of a virtual register. It has the following slots:"
{ $table
@ -58,6 +61,9 @@ HELP: live-interval-state
HELP: live-intervals
{ $var-description "Mapping from vreg to " { $link live-interval-state } "." } ;
HELP: live-range
{ $class-description "Represents a range in the " { $link cfg } " in which a vreg is live." } ;
HELP: sync-point
{ $class-description "A location where all registers have to be spilled. For example when garbage collection is run or an alien ffi call is invoked. Figuring out where in the " { $link cfg } " the sync points are is done in the " { $link compute-live-intervals } " step. The tuple has the following slots:"
{ $table
@ -68,3 +74,20 @@ HELP: sync-point
HELP: sync-points
{ $var-description "Sequence of sync points." } ;
HELP: to
{ $var-description "An integer representing a sequence number equal to the highest number in the currently processed block." } ;
ARTICLE: "compiler.cfg.linear-scan.live-intervals" "Live interval utilities"
"This vocab contains words for managing live intervals."
$nl
"Liveness classes and constructors:"
{ $subsections
<live-interval>
<live-range>
live-interval
live-range
} ;
ABOUT: "compiler.cfg.linear-scan.live-intervals"

8
basis/compiler/cfg/liveness/liveness-docs.factor
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@ -38,6 +38,9 @@ HELP: live-ins
{ $var-description "Hash that maps from basic blocks to vregs that are live in them." }
{ $see-also compute-live-sets } ;
HELP: live-outs
{ $var-description "Hash that maps from basic blocks to sets of vregs that are live after execution leaves the block." } ;
HELP: lookup-base-pointer
{ $values { "vreg" "vreg" } { "vreg/f" { $maybe "vreg" } } }
{ $description "Tries to figure out what the base pointer for a vreg is. Can't use cache here because of infinite recursion inside the quotation passed to cache" }
@ -53,6 +56,9 @@ $nl
}
$nl
"Querying liveness data:"
{ $subsections live-in live-in? live-out live-out? } ;
{ $subsections
live-in live-in? live-ins
live-out live-out? live-outs
} ;
ABOUT: "compiler.cfg.liveness"

5
basis/compiler/cfg/parallel-copy/parallel-copy-docs.factor
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@ -16,6 +16,9 @@ HELP: parallel-copy-rep
{ $description "Creates " { $link ##copy } " instructions. Representation selection must have been run previously." } ;
ARTICLE: "compiler.cfg.parallel-copy" "Parallel copy"
"Revisiting Out-of-SSA Translation for Correctness, Code Quality, and Efficiency http://hal.archives-ouvertes.fr/docs/00/34/99/25/PDF/OutSSA-RR.pdf, Algorithm 1" ;
"Revisiting Out-of-SSA Translation for Correctness, Code Quality, and Efficiency http://hal.archives-ouvertes.fr/docs/00/34/99/25/PDF/OutSSA-RR.pdf, Algorithm 1"
$nl
"Generating " { $link ##copy } " instructions:"
{ $subsections parallel-copy parallel-copy-rep } ;
ABOUT: "compiler.cfg.parallel-copy"

14
basis/compiler/cfg/ssa/construction/construction-docs.factor
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@ -1,7 +1,11 @@
USING: compiler.cfg.instructions compiler.cfg.ssa.construction.private
help.markup help.syntax ;
USING: compiler.cfg compiler.cfg.instructions
compiler.cfg.ssa.construction.private help.markup help.syntax ;
IN: compiler.cfg.ssa.construction
HELP: <##phi>
{ $values { "vreg" "vreg" } { "bb" basic-block } { "##phi" ##phi } }
{ $description "Creates a new " { $link ##phi } " instruction given a vreg and a basic block." } ;
HELP: phis
{ $var-description "Maps vregs to " { $link ##phi } " instructions." } ;
@ -17,6 +21,12 @@ HELP: defs-multi
HELP: inserting-phis
{ $var-description "Maps basic blocks to sequences of " { $link ##phi } " instructions." } ;
HELP: pushed
{ $var-description "Maps vregs to renaming stacks." } ;
HELP: stacks
{ $var-description "Maps vregs to renaming stacks." } ;
ARTICLE: "compiler.cfg.ssa.construction" "SSA construction"
"Iterated dominance frontiers are computed using the DJ Graph method in " { $vocab-link "compiler.cfg.ssa.construction.tdmsc" } "."
$nl

16
basis/compiler/cfg/ssa/construction/construction.factor
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@ -4,10 +4,10 @@ USING: accessors assocs combinators compiler.cfg
compiler.cfg.def-use compiler.cfg.dominance
compiler.cfg.instructions compiler.cfg.registers
compiler.cfg.renaming.functor compiler.cfg.rpo
compiler.cfg.ssa.construction.tdmsc deques dlists fry kernel
math namespaces sequences sets ;
compiler.cfg.ssa.construction.tdmsc compiler.cfg.utilities deques dlists fry
kernel math sequences sets ;
FROM: assocs => change-at ;
FROM: namespaces => set ;
FROM: namespaces => set get ;
IN: compiler.cfg.ssa.construction
<PRIVATE
@ -36,9 +36,11 @@ M: vreg-insn compute-insn-defs
SYMBOL: inserting-phis
: <##phi> ( vreg bb -- ##phi )
predecessors>> over '[ _ ] H{ } map>assoc ##phi new-insn ;
: insert-phi-later ( vreg bb -- )
[ predecessors>> over '[ _ ] H{ } map>assoc ##phi new-insn ] keep
inserting-phis get push-at ;
[ <##phi> ] keep inserting-phis get push-at ;
: compute-phis-for ( vreg bbs -- )
members merge-set [ insert-phi-later ] with each ;
@ -52,7 +54,6 @@ SYMBOL: phis
SYMBOL: used-vregs
! Maps vregs to renaming stacks
SYMBOLS: stacks pushed ;
: init-renaming ( -- )
@ -124,8 +125,7 @@ M: vreg-insn rename-insn
pop-stacks ;
: rename ( cfg -- )
init-renaming
entry>> rename-in-block ;
init-renaming entry>> rename-in-block ;
! Live phis
SYMBOL: live-phis

4
basis/compiler/cfg/ssa/destruction/destruction-docs.factor
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@ -1,6 +1,6 @@
USING: compiler.cfg compiler.cfg.instructions
compiler.cfg.ssa.destruction.private compiler.cfg.ssa.interference help.markup
help.syntax kernel sequences ;
compiler.cfg.ssa.destruction.private compiler.cfg.ssa.destruction.leaders
compiler.cfg.ssa.interference help.markup help.syntax kernel sequences ;
IN: compiler.cfg.ssa.destruction
HELP: class-element-map

9
basis/compiler/cfg/ssa/destruction/leaders/leaders-docs.factor
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@ -1,8 +1,13 @@
USING: help.markup help.syntax math ;
USING: compiler.cfg.ssa.destruction.private help.markup help.syntax math ;
IN: compiler.cfg.ssa.destruction.leaders
HELP: ?leader
{ $values { "vreg" "vreg" } { "vreg'" "vreg" } }
{ $description "The leader of the vreg or the register itself if it has no other leader." } ;
HELP: leader-map
{ $var-description "A map from vregs to canonical representatives due to coalescing done by SSA destruction. Used by liveness analysis and the register allocator, so we can use the original SSA names to get certain info (reaching definitions, representations)." } ;
{ $var-description "A map from vregs to canonical representatives due to coalescing done by SSA destruction. Used by liveness analysis and the register allocator, so we can use the original SSA names to get certain info (reaching definitions, representations). By default, each vreg is its own leader." }
{ $see-also init-coalescing perform-coalescing } ;
ARTICLE: "compiler.cfg.ssa.destruction.leaders" "Leader book-keeping" "This vocab defines words for getting the leaders of vregs." ;

20
basis/compiler/cfg/ssa/interference/interference-docs.factor Normal file
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@ -0,0 +1,20 @@
USING: help.markup help.syntax ;
IN: compiler.cfg.ssa.interference
HELP: vreg-info
{ $class-description
"Slots:"
{ $table
{ { $slot "vreg" } { "The vreg the vreg-info is the info for." } }
}
} ;
ARTICLE: "compiler.cfg.ssa.interference" "Interference testing using SSA properties."
"Interference testing using SSA properties"
$nl
"Based on:"
$nl
"Revisiting Out-of-SSA Translation for Correctness, Code Quality, and Efficiency http://hal.archives-ouvertes.fr/docs/00/34/99/25/PDF/OutSSA-RR.pdf" ;
ABOUT: "compiler.cfg.ssa.interference"

7
basis/compiler/cfg/ssa/interference/interference.factor
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@ -5,13 +5,6 @@ compiler.cfg.dominance compiler.cfg.ssa.interference.live-ranges
kernel locals math math.order sequences sorting.slots ;
IN: compiler.cfg.ssa.interference
! Interference testing using SSA properties.
!
! Based on:
!
! Revisiting Out-of-SSA Translation for Correctness, Code Quality, and Efficiency
! http://hal.archives-ouvertes.fr/docs/00/34/99/25/PDF/OutSSA-RR.pdf
TUPLE: vreg-info vreg value def-index bb pre-of color equal-anc-in equal-anc-out ;
:: <vreg-info> ( vreg value bb -- info )