cpu.x86.assembler: small cleanups
Slava Pestov
parent
4d749c9dfe
commit
655497b7b4
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@ -2,6 +2,13 @@ USING: cpu.x86.assembler cpu.x86.assembler.operands
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kernel tools.test namespaces make layouts ;
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IN: cpu.x86.assembler.tests
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! immediate operands
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[ { HEX: b9 HEX: 01 HEX: 00 HEX: 00 HEX: 00 } ] [ [ ECX 1 MOV ] { } make ] unit-test
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[ { HEX: 83 HEX: c1 HEX: 01 } ] [ [ ECX 1 ADD ] { } make ] unit-test
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[ { HEX: 81 HEX: c1 HEX: 96 HEX: 00 HEX: 00 HEX: 00 } ] [ [ ECX 150 ADD ] { } make ] unit-test
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[ { HEX: f7 HEX: c1 HEX: d2 HEX: 04 HEX: 00 HEX: 00 } ] [ [ ECX 1234 TEST ] { } make ] unit-test
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! 64-bit registers
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[ { HEX: 40 HEX: 8a HEX: 2a } ] [ [ BPL RDX [] MOV ] { } make ] unit-test
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[ { HEX: 49 HEX: 89 HEX: 04 HEX: 24 } ] [ [ R12 [] RAX MOV ] { } make ] unit-test
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@ -100,13 +107,6 @@ IN: cpu.x86.assembler.tests
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[ { HEX: f2 HEX: 48 HEX: 0f HEX: 2a HEX: c0 } ] [ [ XMM0 RAX CVTSI2SD ] { } make ] unit-test
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[ { HEX: f2 HEX: 49 HEX: 0f HEX: 2a HEX: c4 } ] [ [ XMM0 R12 CVTSI2SD ] { } make ] unit-test
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! [ { HEX: f2 HEX: 49 HEX: 0f HEX: 2c HEX: c1 } ] [ [ XMM9 RAX CVTSI2SD ] { } make ] unit-test
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! [ { HEX: f2 HEX: 0f HEX: 10 HEX: 00 } ] [ [ XMM0 RAX [] MOVSD ] { } make ] unit-test
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! [ { HEX: f2 HEX: 41 HEX: 0f HEX: 10 HEX: 04 HEX: 24 } ] [ [ XMM0 R12 [] MOVSD ] { } make ] unit-test
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! [ { HEX: f2 HEX: 0f HEX: 11 HEX: 00 } ] [ [ RAX [] XMM0 MOVSD ] { } make ] unit-test
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! [ { HEX: f2 HEX: 41 HEX: 0f HEX: 11 HEX: 04 HEX: 24 } ] [ [ R12 [] XMM0 MOVSD ] { } make ] unit-test
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! 3-operand r-rm-imm sse instructions
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[ { HEX: 66 HEX: 0f HEX: 70 HEX: c1 HEX: 02 } ]
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[ [ XMM0 XMM1 2 PSHUFD ] { } make ] unit-test
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@ -167,14 +167,18 @@ IN: cpu.x86.assembler.tests
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[ { HEX: f2 HEX: 0f HEX: 38 HEX: f1 HEX: c1 } ] [ [ EAX ECX CRC32 ] { } make ] unit-test
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[ { HEX: f2 HEX: 0f HEX: 38 HEX: f1 HEX: 01 } ] [ [ EAX ECX [] CRC32 ] { } make ] unit-test
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! various oddities
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! shifts
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[ { HEX: 48 HEX: d3 HEX: e0 } ] [ [ RAX CL SHL ] { } make ] unit-test
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[ { HEX: 48 HEX: d3 HEX: e1 } ] [ [ RCX CL SHL ] { } make ] unit-test
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[ { HEX: 48 HEX: d3 HEX: e8 } ] [ [ RAX CL SHR ] { } make ] unit-test
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[ { HEX: 48 HEX: d3 HEX: e9 } ] [ [ RCX CL SHR ] { } make ] unit-test
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[ { HEX: f7 HEX: c1 HEX: d2 HEX: 04 HEX: 00 HEX: 00 } ] [ [ ECX 1234 TEST ] { } make ] unit-test
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[ { HEX: c1 HEX: e0 HEX: 05 } ] [ [ EAX 5 SHL ] { } make ] unit-test
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[ { HEX: c1 HEX: e1 HEX: 05 } ] [ [ ECX 5 SHL ] { } make ] unit-test
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[ { HEX: c1 HEX: e8 HEX: 05 } ] [ [ EAX 5 SHR ] { } make ] unit-test
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[ { HEX: c1 HEX: e9 HEX: 05 } ] [ [ ECX 5 SHR ] { } make ] unit-test
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! multiplication
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[ { HEX: 4d HEX: 6b HEX: c0 HEX: 03 } ] [ [ R8 R8 3 IMUL3 ] { } make ] unit-test
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[ { HEX: 49 HEX: 6b HEX: c0 HEX: 03 } ] [ [ RAX R8 3 IMUL3 ] { } make ] unit-test
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[ { HEX: 4c HEX: 6b HEX: c0 HEX: 03 } ] [ [ R8 RAX 3 IMUL3 ] { } make ] unit-test
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@ -4,7 +4,6 @@ USING: arrays io.binary kernel combinators
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combinators.short-circuit math math.bitwise locals namespaces
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make sequences words system layouts math.order accessors
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cpu.x86.assembler.operands cpu.x86.assembler.operands.private ;
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QUALIFIED: sequences
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IN: cpu.x86.assembler
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! A postfix assembler for x86-32 and x86-64.
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@ -71,10 +70,10 @@ M: byte n, [ value>> ] dip n, ;
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: 2, ( n -- ) 2 n, ; inline
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: cell, ( n -- ) bootstrap-cell n, ; inline
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: mod-r/m, ( reg# indirect -- )
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: mod-r/m, ( reg operand -- )
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[ 3 shift ] [ [ modifier 6 shift ] [ r/m ] bi ] bi* bitor bitor , ;
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: sib, ( indirect -- )
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: sib, ( operand -- )
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dup sib-present? [
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[ indirect-base* ]
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[ indirect-index* 3 shift ]
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@ -93,14 +92,14 @@ M: indirect displacement,
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M: register displacement, drop ;
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: addressing ( reg# indirect -- )
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: addressing ( reg operand -- )
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[ mod-r/m, ] [ sib, ] [ displacement, ] tri ;
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: rex.w? ( rex.w reg r/m -- ? )
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{
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{ [ dup register-128? ] [ drop operand-64? ] }
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{ [ dup not ] [ drop operand-64? ] }
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[ nip operand-64? ]
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{ [ over register-128? ] [ nip operand-64? ] }
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{ [ over not ] [ nip operand-64? ] }
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[ drop operand-64? ]
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} cond and ;
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: rex.r ( m op -- n )
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@ -119,16 +118,15 @@ M: register displacement, drop ;
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:: rex-prefix ( reg r/m rex.w -- )
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#! Compile an AMD64 REX prefix.
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rex.w reg r/m rex.w? BIN: 01001000 BIN: 01000000 ?
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r/m rex.r
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reg rex.b
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reg rex.r
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r/m rex.b
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dup reg r/m no-prefix? [ drop ] [ , ] if ;
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: 16-prefix ( reg r/m -- )
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[ register-16? ] either? [ HEX: 66 , ] when ;
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: 16-prefix ( reg -- )
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register-16? [ HEX: 66 , ] when ;
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: prefix ( reg r/m rex.w -- ) [ drop 16-prefix ] [ rex-prefix ] 3bi ;
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: prefix-1 ( reg rex.w -- ) f swap prefix ;
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: prefix-1 ( reg rex.w -- )
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[ drop 16-prefix ] [ [ f ] 2dip rex-prefix ] 2bi ;
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: short-operand ( reg rex.w n -- )
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#! Some instructions encode their single operand as part of
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@ -138,57 +136,57 @@ M: register displacement, drop ;
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: opcode, ( opcode -- ) dup array? [ % ] [ , ] if ;
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: extended-opcode ( opcode -- opcode' )
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dup array? [ OCT: 17 sequences:prefix ] [ OCT: 17 swap 2array ] if ;
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dup array? [ OCT: 17 prefix ] [ OCT: 17 swap 2array ] if ;
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: extended-opcode, ( opcode -- ) extended-opcode opcode, ;
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: opcode-or ( opcode mask -- opcode' )
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swap dup array?
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[ unclip-last rot bitor suffix ] [ bitor ] if ;
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over array?
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[ [ unclip-last ] dip bitor suffix ] [ bitor ] if ;
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: 1-operand ( op reg,rex.w,opcode -- )
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: 1-operand ( operand reg,rex.w,opcode -- )
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#! The 'reg' is not really a register, but a value for the
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#! 'reg' field of the mod-r/m byte.
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first3 [ [ over ] dip prefix-1 ] dip opcode, swap addressing ;
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: immediate-operand-size-bit ( imm dst reg,rex.w,opcode -- imm dst reg,rex.w,opcode )
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pick integer? [ first3 BIN: 1 opcode-or 3array ] when ;
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: immediate-operand-size-bit ( dst imm reg,rex.w,opcode -- imm dst reg,rex.w,opcode )
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over integer? [ first3 BIN: 1 opcode-or 3array ] when ;
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: immediate-1 ( imm dst reg,rex.w,opcode -- )
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immediate-operand-size-bit 1-operand 1, ;
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: immediate-1 ( dst imm reg,rex.w,opcode -- )
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immediate-operand-size-bit swap [ 1-operand ] dip 1, ;
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: immediate-4 ( imm dst reg,rex.w,opcode -- )
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immediate-operand-size-bit 1-operand 4, ;
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: immediate-4 ( dst imm reg,rex.w,opcode -- )
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immediate-operand-size-bit swap [ 1-operand ] dip 4, ;
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: immediate-fits-in-size-bit ( imm dst reg,rex.w,opcode -- imm dst reg,rex.w,opcode )
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pick integer? [ first3 BIN: 10 opcode-or 3array ] when ;
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: immediate-fits-in-size-bit ( dst imm reg,rex.w,opcode -- imm dst reg,rex.w,opcode )
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over integer? [ first3 BIN: 10 opcode-or 3array ] when ;
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: immediate-1/4 ( imm dst reg,rex.w,opcode -- )
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: immediate-1/4 ( dst imm reg,rex.w,opcode -- )
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#! If imm is a byte, compile the opcode and the byte.
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#! Otherwise, set the 8-bit operand flag in the opcode, and
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#! compile the cell. The 'reg' is not really a register, but
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#! a value for the 'reg' field of the mod-r/m byte.
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pick fits-in-byte? [
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over fits-in-byte? [
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immediate-fits-in-size-bit immediate-1
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] [
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immediate-4
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] if ;
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: (2-operand) ( dst src op -- )
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: (2-operand) ( reg operand op -- )
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[ 2dup t rex-prefix ] dip opcode,
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reg-code swap addressing ;
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[ reg-code ] dip addressing ;
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: direction-bit ( dst src op -- dst' src' op' )
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: direction-bit ( dst src op -- reg operand op' )
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pick register? pick register? not and
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[ BIN: 10 opcode-or swapd ] when ;
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[ BIN: 10 opcode-or ] [ swapd ] if ;
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: operand-size-bit ( dst src op -- dst' src' op' )
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over register-8? [ BIN: 1 opcode-or ] unless ;
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: operand-size-bit ( reg operand op -- reg operand op' )
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pick register-8? [ BIN: 1 opcode-or ] unless ;
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: 2-operand ( dst src op -- )
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#! Sets the opcode's direction bit. It is set if the
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#! destination is a direct register operand.
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[ drop 16-prefix ] [ direction-bit operand-size-bit (2-operand) ] 3bi ;
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direction-bit operand-size-bit
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pick 16-prefix
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(2-operand) ;
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PRIVATE>
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@ -212,16 +210,16 @@ M: operand POP { BIN: 000 f HEX: 8f } 1-operand ;
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! MOV where the src is immediate.
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<PRIVATE
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GENERIC: (MOV-I) ( src dst -- )
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M: register (MOV-I) t HEX: b8 short-operand cell, ;
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GENERIC# (MOV-I) 1 ( dst src -- )
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M: register (MOV-I) [ t HEX: b8 short-operand ] [ cell, ] bi* ;
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M: operand (MOV-I)
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{ BIN: 000 t HEX: c6 }
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pick byte? [ immediate-1 ] [ immediate-4 ] if ;
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over byte? [ immediate-1 ] [ immediate-4 ] if ;
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PRIVATE>
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GENERIC: MOV ( dst src -- )
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M: immediate MOV swap (MOV-I) ;
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M: immediate MOV (MOV-I) ;
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M: operand MOV HEX: 88 2-operand ;
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: LEA ( dst src -- ) swap HEX: 8d 2-operand ;
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@ -267,44 +265,44 @@ PRIVATE>
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! Arithmetic
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GENERIC: ADD ( dst src -- )
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M: immediate ADD swap { BIN: 000 t HEX: 80 } immediate-1/4 ;
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M: immediate ADD { BIN: 000 t HEX: 80 } immediate-1/4 ;
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M: operand ADD OCT: 000 2-operand ;
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GENERIC: OR ( dst src -- )
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M: immediate OR swap { BIN: 001 t HEX: 80 } immediate-1/4 ;
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M: immediate OR { BIN: 001 t HEX: 80 } immediate-1/4 ;
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M: operand OR OCT: 010 2-operand ;
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GENERIC: ADC ( dst src -- )
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M: immediate ADC swap { BIN: 010 t HEX: 80 } immediate-1/4 ;
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M: immediate ADC { BIN: 010 t HEX: 80 } immediate-1/4 ;
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M: operand ADC OCT: 020 2-operand ;
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GENERIC: SBB ( dst src -- )
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M: immediate SBB swap { BIN: 011 t HEX: 80 } immediate-1/4 ;
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M: immediate SBB { BIN: 011 t HEX: 80 } immediate-1/4 ;
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M: operand SBB OCT: 030 2-operand ;
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GENERIC: AND ( dst src -- )
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M: immediate AND swap { BIN: 100 t HEX: 80 } immediate-1/4 ;
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M: immediate AND { BIN: 100 t HEX: 80 } immediate-1/4 ;
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M: operand AND OCT: 040 2-operand ;
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GENERIC: SUB ( dst src -- )
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M: immediate SUB swap { BIN: 101 t HEX: 80 } immediate-1/4 ;
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M: immediate SUB { BIN: 101 t HEX: 80 } immediate-1/4 ;
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M: operand SUB OCT: 050 2-operand ;
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GENERIC: XOR ( dst src -- )
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M: immediate XOR swap { BIN: 110 t HEX: 80 } immediate-1/4 ;
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M: immediate XOR { BIN: 110 t HEX: 80 } immediate-1/4 ;
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M: operand XOR OCT: 060 2-operand ;
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GENERIC: CMP ( dst src -- )
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M: immediate CMP swap { BIN: 111 t HEX: 80 } immediate-1/4 ;
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M: immediate CMP { BIN: 111 t HEX: 80 } immediate-1/4 ;
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M: operand CMP OCT: 070 2-operand ;
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GENERIC: TEST ( dst src -- )
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M: immediate TEST swap { BIN: 0 t HEX: f7 } immediate-4 ;
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M: immediate TEST { BIN: 0 t HEX: f7 } immediate-4 ;
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M: operand TEST OCT: 204 2-operand ;
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: XCHG ( dst src -- ) OCT: 207 2-operand ;
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: BSR ( dst src -- ) swap { HEX: 0f HEX: bd } (2-operand) ;
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: BSR ( dst src -- ) { HEX: 0f HEX: bd } (2-operand) ;
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: NOT ( dst -- ) { BIN: 010 t HEX: f7 } 1-operand ;
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: NEG ( dst -- ) { BIN: 011 t HEX: f7 } 1-operand ;
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@ -318,11 +316,11 @@ M: operand TEST OCT: 204 2-operand ;
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<PRIVATE
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: (SHIFT) ( dst src op -- )
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over CL eq? [
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nip t HEX: d3 3array 1-operand
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:: (SHIFT) ( dst src op -- )
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src CL eq? [
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dst { op t HEX: d3 } 1-operand
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] [
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swapd t HEX: c0 3array immediate-1
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dst src { op t HEX: c0 } immediate-1
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] if ; inline
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PRIVATE>
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@ -336,7 +334,7 @@ PRIVATE>
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: SAR ( dst n -- ) BIN: 111 (SHIFT) ;
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: IMUL2 ( dst src -- )
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OCT: 257 extended-opcode (2-operand) ;
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swap OCT: 257 extended-opcode (2-operand) ;
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: IMUL3 ( dst src imm -- )
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dup fits-in-byte? [
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@ -346,19 +344,17 @@ PRIVATE>
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] if ;
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: MOVSX ( dst src -- )
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swap
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over register-32? OCT: 143 OCT: 276 extended-opcode ?
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pick register-16? [ BIN: 1 opcode-or ] when
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dup register-32? OCT: 143 OCT: 276 extended-opcode ?
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over register-16? [ BIN: 1 opcode-or ] when
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(2-operand) ;
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: MOVZX ( dst src -- )
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swap
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OCT: 266 extended-opcode
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pick register-16? [ BIN: 1 opcode-or ] when
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over register-16? [ BIN: 1 opcode-or ] when
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(2-operand) ;
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! Conditional move
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: MOVcc ( dst src cc -- ) extended-opcode swapd (2-operand) ;
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: MOVcc ( dst src cc -- ) extended-opcode (2-operand) ;
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: CMOVO ( dst src -- ) HEX: 40 MOVcc ;
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: CMOVNO ( dst src -- ) HEX: 41 MOVcc ;
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@ -409,34 +405,34 @@ PRIVATE>
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<PRIVATE
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: direction-bit-sse ( dst src op1 -- dst' src' op1' )
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pick register-128? [ swapd ] [ BIN: 1 bitor ] if ;
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pick register-128? [ swapd BIN: 1 bitor ] unless ;
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: 2-operand-sse ( dst src op1 op2 -- )
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[ , ] when* direction-bit-sse extended-opcode (2-operand) ;
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: direction-op-sse ( dst src op1s -- dst' src' op1' )
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pick register-128? [ swapd first ] [ second ] if ;
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pick register-128? [ first ] [ swapd second ] if ;
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: 2-operand-rm-mr-sse ( dst src op1{rm,mr} op2 -- )
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[ , ] when* direction-op-sse extended-opcode (2-operand) ;
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: 2-operand-rm-sse ( dst src op1 op2 -- )
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[ , ] when* swapd extended-opcode (2-operand) ;
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: 2-operand-mr-sse ( dst src op1 op2 -- )
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[ , ] when* extended-opcode (2-operand) ;
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: 2-operand-mr-sse ( dst src op1 op2 -- )
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[ , ] when* extended-opcode swapd (2-operand) ;
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: 2-operand-int/sse ( dst src op1 op2 -- )
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[ , ] when* swapd extended-opcode (2-operand) ;
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[ , ] when* extended-opcode (2-operand) ;
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: 3-operand-rm-sse ( dst src imm op1 op2 -- )
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rot [ 2-operand-rm-sse ] dip , ;
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:: 3-operand-rm-sse ( dst src imm op1 op2 -- )
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dst src op1 op2 2-operand-rm-sse imm , ;
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: 3-operand-mr-sse ( dst src imm op1 op2 -- )
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rot [ 2-operand-mr-sse ] dip , ;
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:: 3-operand-mr-sse ( dst src imm op1 op2 -- )
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dst src op1 op2 2-operand-mr-sse imm , ;
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: 3-operand-rm-mr-sse ( dst src imm op1 op2 -- )
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rot [ 2-operand-rm-mr-sse ] dip , ;
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:: 3-operand-rm-mr-sse ( dst src imm op1 op2 -- )
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dst src op1 op2 2-operand-rm-mr-sse imm , ;
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: 2-operand-sse-cmp ( dst src cmp op1 op2 -- )
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3-operand-rm-sse ; inline
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@ -739,7 +735,7 @@ PRIVATE>
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: CMPNLESS ( dest src -- ) 6 HEX: c2 HEX: f3 2-operand-sse-cmp ;
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: CMPORDSS ( dest src -- ) 7 HEX: c2 HEX: f3 2-operand-sse-cmp ;
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: MOVNTI ( dest src -- ) { HEX: 0f HEX: c3 } (2-operand) ;
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: MOVNTI ( dest src -- ) swap { HEX: 0f HEX: c3 } (2-operand) ;
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: PINSRW ( dest src imm -- ) HEX: c4 HEX: 66 3-operand-rm-sse ;
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: SHUFPS ( dest src imm -- ) 4shuffler HEX: c6 f 3-operand-rm-sse ;
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@ -793,4 +789,3 @@ PRIVATE>
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: HWNT ( -- ) HEX: 2e , ; ! Hint branch Weakly Not Taken
|
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: HST ( -- ) HEX: 3e , ; ! Hint branch Strongly Taken
|
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|
|
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Loading…
Reference in New Issue