compiler.cfg.linear-scan.assignment: modifies instructions in place instead of storing a registers assoc for further compile-time performance improvement
Slava Pestov
parent
1532a6f2e3
commit
74766d1ccd
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@ -7,11 +7,12 @@ compiler.cfg.renaming compiler.cfg.instructions compiler.cfg.utilities ;
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IN: compiler.cfg.branch-splitting
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: clone-instructions ( insns -- insns' )
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[ clone dup fresh-insn-temps ] map ;
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[ clone dup rename-insn-temps ] map ;
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: clone-basic-block ( bb -- bb' )
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! The new block gets the same RPO number as the old one.
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! This is just to make 'back-edge?' work.
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! The new block temporarily gets the same RPO number as the old one,
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! until the next time RPO is computed. This is just to make
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! 'back-edge?' work.
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<basic-block>
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swap
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[ instructions>> clone-instructions >>instructions ]
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@ -13,28 +13,28 @@ TUPLE: insn ;
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! Instruction with no side effects; if 'out' is never read, we
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! can eliminate it.
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TUPLE: ##flushable < insn { dst vreg } ;
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TUPLE: ##flushable < insn dst ;
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! Instruction which is referentially transparent; we can replace
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! repeated computation with a reference to a previous value
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TUPLE: ##pure < ##flushable ;
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TUPLE: ##unary < ##pure { src vreg } ;
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TUPLE: ##unary/temp < ##unary { temp vreg } ;
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TUPLE: ##binary < ##pure { src1 vreg } { src2 vreg } ;
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TUPLE: ##binary-imm < ##pure { src1 vreg } { src2 integer } ;
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TUPLE: ##unary < ##pure src ;
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TUPLE: ##unary/temp < ##unary temp ;
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TUPLE: ##binary < ##pure src1 src2 ;
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TUPLE: ##binary-imm < ##pure src1 { src2 integer } ;
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TUPLE: ##commutative < ##binary ;
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TUPLE: ##commutative-imm < ##binary-imm ;
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! Instruction only used for its side effect, produces no values
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TUPLE: ##effect < insn { src vreg } ;
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TUPLE: ##effect < insn src ;
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! Read/write ops: candidates for alias analysis
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TUPLE: ##read < ##flushable ;
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TUPLE: ##write < ##effect ;
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TUPLE: ##alien-getter < ##flushable { src vreg } ;
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TUPLE: ##alien-setter < ##effect { value vreg } ;
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TUPLE: ##alien-getter < ##flushable src ;
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TUPLE: ##alien-setter < ##effect value ;
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! Stack operations
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INSN: ##load-immediate < ##pure { val integer } ;
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@ -63,14 +63,14 @@ INSN: ##no-tco ;
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INSN: ##dispatch src temp ;
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! Slot access
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INSN: ##slot < ##read { obj vreg } { slot vreg } { tag integer } { temp vreg } ;
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INSN: ##slot-imm < ##read { obj vreg } { slot integer } { tag integer } ;
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INSN: ##set-slot < ##write { obj vreg } { slot vreg } { tag integer } { temp vreg } ;
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INSN: ##set-slot-imm < ##write { obj vreg } { slot integer } { tag integer } ;
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INSN: ##slot < ##read obj slot { tag integer } temp ;
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INSN: ##slot-imm < ##read obj { slot integer } { tag integer } ;
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INSN: ##set-slot < ##write obj slot { tag integer } temp ;
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INSN: ##set-slot-imm < ##write obj { slot integer } { tag integer } ;
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! String element access
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INSN: ##string-nth < ##flushable { obj vreg } { index vreg } { temp vreg } ;
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INSN: ##set-string-nth-fast < ##effect { obj vreg } { index vreg } { temp vreg } ;
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INSN: ##string-nth < ##flushable obj index temp ;
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INSN: ##set-string-nth-fast < ##effect obj index temp ;
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! Integer arithmetic
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INSN: ##add < ##commutative ;
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@ -150,7 +150,7 @@ INSN: ##set-alien-float < ##alien-setter ;
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INSN: ##set-alien-double < ##alien-setter ;
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! Memory allocation
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INSN: ##allot < ##flushable size class { temp vreg } ;
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INSN: ##allot < ##flushable size class temp ;
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UNION: ##allocation ##allot ##box-float ##box-alien ##integer>bignum ;
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@ -173,10 +173,10 @@ INSN: ##branch ;
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INSN: ##phi < ##pure inputs ;
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! Conditionals
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TUPLE: ##conditional-branch < insn { src1 vreg } { src2 vreg } cc ;
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TUPLE: ##conditional-branch < insn src1 src2 cc ;
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INSN: ##compare-branch < ##conditional-branch ;
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INSN: ##compare-imm-branch { src1 vreg } { src2 integer } cc ;
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INSN: ##compare-imm-branch src1 { src2 integer } cc ;
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INSN: ##compare < ##binary cc temp ;
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INSN: ##compare-imm < ##binary-imm cc temp ;
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@ -185,12 +185,12 @@ INSN: ##compare-float-branch < ##conditional-branch ;
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INSN: ##compare-float < ##binary cc temp ;
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! Overflowing arithmetic
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TUPLE: ##fixnum-overflow < insn { dst vreg } { src1 vreg } { src2 vreg } ;
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TUPLE: ##fixnum-overflow < insn dst src1 src2 ;
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INSN: ##fixnum-add < ##fixnum-overflow ;
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INSN: ##fixnum-sub < ##fixnum-overflow ;
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INSN: ##fixnum-mul < ##fixnum-overflow ;
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INSN: ##gc { temp1 vreg } { temp2 vreg } live-values ;
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INSN: ##gc temp1 temp2 live-values ;
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! Instructions used by machine IR only.
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INSN: _prologue stack-frame ;
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@ -204,22 +204,22 @@ INSN: _loop-entry ;
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INSN: _dispatch src temp ;
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INSN: _dispatch-label label ;
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TUPLE: _conditional-branch < insn label { src1 vreg } { src2 vreg } cc ;
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TUPLE: _conditional-branch < insn label src1 src2 cc ;
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INSN: _compare-branch < _conditional-branch ;
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INSN: _compare-imm-branch label { src1 vreg } { src2 integer } cc ;
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INSN: _compare-imm-branch label src1 { src2 integer } cc ;
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INSN: _compare-float-branch < _conditional-branch ;
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! Overflowing arithmetic
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TUPLE: _fixnum-overflow < insn label { dst vreg } { src1 vreg } { src2 vreg } ;
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TUPLE: _fixnum-overflow < insn label dst src1 src2 ;
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INSN: _fixnum-add < _fixnum-overflow ;
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INSN: _fixnum-sub < _fixnum-overflow ;
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INSN: _fixnum-mul < _fixnum-overflow ;
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TUPLE: spill-slot n ; C: <spill-slot> spill-slot
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INSN: _gc { temp1 vreg } { temp2 vreg } gc-roots gc-root-count gc-root-size ;
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INSN: _gc temp1 temp2 gc-roots gc-root-count gc-root-size ;
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! These instructions operate on machine registers and not
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! virtual registers
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@ -9,6 +9,7 @@ compiler.cfg.def-use
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compiler.cfg.liveness
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compiler.cfg.registers
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compiler.cfg.instructions
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compiler.cfg.renaming.functor
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compiler.cfg.linear-scan.allocation
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compiler.cfg.linear-scan.allocation.state
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compiler.cfg.linear-scan.live-intervals ;
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@ -95,13 +96,12 @@ SYMBOL: register-live-outs
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GENERIC: assign-registers-in-insn ( insn -- )
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: all-vregs ( insn -- vregs )
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[ [ temp-vregs ] [ uses-vregs ] bi append ]
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[ defs-vreg ] bi
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[ suffix ] when* ;
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: vreg>reg ( vreg -- reg ) pending-interval-assoc get at ;
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RENAMING: assign [ vreg>reg ] [ vreg>reg ] [ vreg>reg ]
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M: vreg-insn assign-registers-in-insn
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dup all-vregs pending-interval-assoc get extract-keys >>regs drop ;
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[ assign-insn-defs ] [ assign-insn-uses ] [ assign-insn-temps ] tri ;
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M: ##gc assign-registers-in-insn
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! This works because ##gc is always the first instruction
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@ -4,10 +4,11 @@ USING: functors assocs kernel accessors compiler.cfg.instructions
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lexer parser ;
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IN: compiler.cfg.renaming.functor
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FUNCTOR: define-renaming ( NAME DEF-QUOT USE-QUOT -- )
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FUNCTOR: define-renaming ( NAME DEF-QUOT USE-QUOT TEMP-QUOT -- )
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rename-insn-defs DEFINES ${NAME}-insn-defs
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rename-insn-uses DEFINES ${NAME}-insn-uses
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rename-insn-temps DEFINES ${NAME}-insn-temps
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WHERE
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@ -111,6 +112,53 @@ M: ##phi rename-insn-uses
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M: insn rename-insn-uses drop ;
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GENERIC: rename-insn-temps ( insn -- )
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M: ##write-barrier rename-insn-temps
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TEMP-QUOT change-card#
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TEMP-QUOT change-table
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drop ;
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M: ##unary/temp rename-insn-temps
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TEMP-QUOT change-temp drop ;
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M: ##allot rename-insn-temps
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TEMP-QUOT change-temp drop ;
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M: ##dispatch rename-insn-temps
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TEMP-QUOT change-temp drop ;
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M: ##slot rename-insn-temps
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TEMP-QUOT change-temp drop ;
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M: ##set-slot rename-insn-temps
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TEMP-QUOT change-temp drop ;
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M: ##string-nth rename-insn-temps
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TEMP-QUOT change-temp drop ;
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M: ##set-string-nth-fast rename-insn-temps
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TEMP-QUOT change-temp drop ;
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M: ##compare rename-insn-temps
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TEMP-QUOT change-temp drop ;
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M: ##compare-imm rename-insn-temps
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TEMP-QUOT change-temp drop ;
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M: ##compare-float rename-insn-temps
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TEMP-QUOT change-temp drop ;
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M: ##gc rename-insn-temps
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TEMP-QUOT change-temp1
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TEMP-QUOT change-temp2
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drop ;
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M: _dispatch rename-insn-temps
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TEMP-QUOT change-temp drop ;
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M: insn rename-insn-temps drop ;
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;FUNCTOR
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SYNTAX: RENAMING: scan scan-object scan-object define-renaming ;
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SYNTAX: RENAMING: scan scan-object scan-object scan-object define-renaming ;
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@ -10,54 +10,7 @@ SYMBOL: renamings
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: rename-value ( vreg -- vreg' )
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renamings get ?at drop ;
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RENAMING: rename [ rename-value ] [ rename-value ]
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: fresh-vreg ( vreg -- vreg' )
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: fresh-value ( vreg -- vreg' )
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reg-class>> next-vreg ;
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GENERIC: fresh-insn-temps ( insn -- )
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M: ##write-barrier fresh-insn-temps
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[ fresh-vreg ] change-card#
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[ fresh-vreg ] change-table
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drop ;
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M: ##unary/temp fresh-insn-temps
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[ fresh-vreg ] change-temp drop ;
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M: ##allot fresh-insn-temps
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[ fresh-vreg ] change-temp drop ;
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M: ##dispatch fresh-insn-temps
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[ fresh-vreg ] change-temp drop ;
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M: ##slot fresh-insn-temps
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[ fresh-vreg ] change-temp drop ;
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M: ##set-slot fresh-insn-temps
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[ fresh-vreg ] change-temp drop ;
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M: ##string-nth fresh-insn-temps
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[ fresh-vreg ] change-temp drop ;
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M: ##set-string-nth-fast fresh-insn-temps
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[ fresh-vreg ] change-temp drop ;
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M: ##compare fresh-insn-temps
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[ fresh-vreg ] change-temp drop ;
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M: ##compare-imm fresh-insn-temps
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[ fresh-vreg ] change-temp drop ;
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M: ##compare-float fresh-insn-temps
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[ fresh-vreg ] change-temp drop ;
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M: ##gc fresh-insn-temps
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[ fresh-vreg ] change-temp1
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[ fresh-vreg ] change-temp2
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drop ;
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M: _dispatch fresh-insn-temps
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[ fresh-vreg ] change-temp drop ;
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M: insn fresh-insn-temps drop ;
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RENAMING: rename [ rename-value ] [ rename-value ] [ fresh-value ]
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@ -84,7 +84,7 @@ SYMBOLS: stacks pushed ;
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: top-name ( vreg -- vreg' )
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stacks get at last ;
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RENAMING: ssa-rename [ gen-name ] [ top-name ]
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RENAMING: ssa-rename [ gen-name ] [ top-name ] [ ]
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GENERIC: rename-insn ( insn -- )
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@ -24,14 +24,6 @@ H{ } clone insn-counts set-global
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GENERIC: generate-insn ( insn -- )
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SYMBOL: registers
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: register ( vreg -- operand )
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registers get at [ "Bad value" throw ] unless* ;
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: ?register ( obj -- operand )
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dup vreg? [ register ] when ;
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TUPLE: asm label code calls ;
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SYMBOL: calls
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@ -60,9 +52,8 @@ SYMBOL: labels
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instructions>>
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[
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[ class insn-counts get inc-at ]
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[ regs>> registers set ]
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[ generate-insn ]
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tri
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bi
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] each
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] bi
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] with-fixup ;
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@ -79,16 +70,16 @@ SYMBOL: labels
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M: ##no-tco generate-insn drop ;
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M: ##load-immediate generate-insn
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[ dst>> register ] [ val>> ] bi %load-immediate ;
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[ dst>> ] [ val>> ] bi %load-immediate ;
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M: ##load-reference generate-insn
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[ dst>> register ] [ obj>> ] bi %load-reference ;
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[ dst>> ] [ obj>> ] bi %load-reference ;
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M: ##peek generate-insn
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[ dst>> register ] [ loc>> ] bi %peek ;
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[ dst>> ] [ loc>> ] bi %peek ;
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M: ##replace generate-insn
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[ src>> register ] [ loc>> ] bi %replace ;
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[ src>> ] [ loc>> ] bi %replace ;
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M: ##inc-d generate-insn n>> %inc-d ;
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@ -103,7 +94,7 @@ M: ##jump generate-insn word>> [ add-call ] [ %jump ] bi ;
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M: ##return generate-insn drop %return ;
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M: _dispatch generate-insn
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[ src>> register ] [ temp>> register ] bi %dispatch ;
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[ src>> ] [ temp>> ] bi %dispatch ;
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M: _dispatch-label generate-insn
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label>> lookup-label
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@ -111,56 +102,34 @@ M: _dispatch-label generate-insn
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rc-absolute-cell label-fixup ;
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: >slot< ( insn -- dst obj slot tag )
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{
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[ dst>> register ]
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[ obj>> register ]
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[ slot>> ?register ]
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[ tag>> ]
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} cleave ; inline
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{ [ dst>> ] [ obj>> ] [ slot>> ] [ tag>> ] } cleave ; inline
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M: ##slot generate-insn
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[ >slot< ] [ temp>> register ] bi %slot ;
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[ >slot< ] [ temp>> ] bi %slot ;
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M: ##slot-imm generate-insn
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>slot< %slot-imm ;
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: >set-slot< ( insn -- src obj slot tag )
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{
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[ src>> register ]
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[ obj>> register ]
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[ slot>> ?register ]
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[ tag>> ]
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} cleave ; inline
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{ [ src>> ] [ obj>> ] [ slot>> ] [ tag>> ] } cleave ; inline
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M: ##set-slot generate-insn
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[ >set-slot< ] [ temp>> register ] bi %set-slot ;
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[ >set-slot< ] [ temp>> ] bi %set-slot ;
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M: ##set-slot-imm generate-insn
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>set-slot< %set-slot-imm ;
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M: ##string-nth generate-insn
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{
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[ dst>> register ]
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[ obj>> register ]
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[ index>> register ]
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[ temp>> register ]
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} cleave %string-nth ;
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{ [ dst>> ] [ obj>> ] [ index>> ] [ temp>> ] } cleave %string-nth ;
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M: ##set-string-nth-fast generate-insn
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{
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[ src>> register ]
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[ obj>> register ]
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[ index>> register ]
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[ temp>> register ]
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} cleave %set-string-nth-fast ;
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{ [ src>> ] [ obj>> ] [ index>> ] [ temp>> ] } cleave %set-string-nth-fast ;
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: dst/src ( insn -- dst src )
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[ dst>> register ] [ src>> register ] bi ; inline
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[ dst>> ] [ src>> ] bi ; inline
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: dst/src1/src2 ( insn -- dst src1 src2 )
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[ dst>> register ]
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[ src1>> register ]
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[ src2>> ?register ] tri ; inline
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[ dst>> ] [ src1>> ] [ src2>> ] tri ; inline
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M: ##add generate-insn dst/src1/src2 %add ;
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M: ##add-imm generate-insn dst/src1/src2 %add-imm ;
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@ -191,7 +160,7 @@ M: _fixnum-sub generate-insn label/dst/src1/src2 %fixnum-sub ;
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M: _fixnum-mul generate-insn label/dst/src1/src2 %fixnum-mul ;
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: dst/src/temp ( insn -- dst src temp )
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[ dst/src ] [ temp>> register ] bi ; inline
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[ dst/src ] [ temp>> ] bi ; inline
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M: ##integer>bignum generate-insn dst/src/temp %integer>bignum ;
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M: ##bignum>integer generate-insn dst/src/temp %bignum>integer ;
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@ -222,7 +191,7 @@ M: ##alien-float generate-insn dst/src %alien-float ;
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M: ##alien-double generate-insn dst/src %alien-double ;
|
||||
|
||||
: >alien-setter< ( insn -- src value )
|
||||
[ src>> register ] [ value>> register ] bi ; inline
|
||||
[ src>> ] [ value>> ] bi ; inline
|
||||
|
||||
M: ##set-alien-integer-1 generate-insn >alien-setter< %set-alien-integer-1 ;
|
||||
M: ##set-alien-integer-2 generate-insn >alien-setter< %set-alien-integer-2 ;
|
||||
|
|
@ -233,23 +202,23 @@ M: ##set-alien-double generate-insn >alien-setter< %set-alien-double ;
|
|||
|
||||
M: ##allot generate-insn
|
||||
{
|
||||
[ dst>> register ]
|
||||
[ dst>> ]
|
||||
[ size>> ]
|
||||
[ class>> ]
|
||||
[ temp>> register ]
|
||||
[ temp>> ]
|
||||
} cleave
|
||||
%allot ;
|
||||
|
||||
M: ##write-barrier generate-insn
|
||||
[ src>> register ]
|
||||
[ card#>> register ]
|
||||
[ table>> register ]
|
||||
[ src>> ]
|
||||
[ card#>> ]
|
||||
[ table>> ]
|
||||
tri %write-barrier ;
|
||||
|
||||
M: _gc generate-insn
|
||||
{
|
||||
[ temp1>> register ]
|
||||
[ temp2>> register ]
|
||||
[ temp1>> ]
|
||||
[ temp2>> ]
|
||||
[ gc-roots>> ]
|
||||
[ gc-root-count>> ]
|
||||
} cleave %gc ;
|
||||
|
|
@ -257,7 +226,7 @@ M: _gc generate-insn
|
|||
M: _loop-entry generate-insn drop %loop-entry ;
|
||||
|
||||
M: ##alien-global generate-insn
|
||||
[ dst>> register ] [ symbol>> ] [ library>> ] tri
|
||||
[ dst>> ] [ symbol>> ] [ library>> ] tri
|
||||
%alien-global ;
|
||||
|
||||
! ##alien-invoke
|
||||
|
|
@ -370,7 +339,7 @@ M: long-long-type flatten-value-type ( type -- types )
|
|||
|
||||
: objects>registers ( params -- )
|
||||
#! Generate code for unboxing a list of C types, then
|
||||
#! generate code for moving these parameters to register on
|
||||
#! generate code for moving these parameters to registers on
|
||||
#! architectures where parameters are passed in registers.
|
||||
[
|
||||
[ prepare-box-struct ] keep
|
||||
|
|
@ -499,11 +468,11 @@ M: _branch generate-insn
|
|||
|
||||
: >compare< ( insn -- dst temp cc src1 src2 )
|
||||
{
|
||||
[ dst>> register ]
|
||||
[ temp>> register ]
|
||||
[ dst>> ]
|
||||
[ temp>> ]
|
||||
[ cc>> ]
|
||||
[ src1>> register ]
|
||||
[ src2>> ?register ]
|
||||
[ src1>> ]
|
||||
[ src2>> ]
|
||||
} cleave ; inline
|
||||
|
||||
M: ##compare generate-insn >compare< %compare ;
|
||||
|
|
@ -514,8 +483,8 @@ M: ##compare-float generate-insn >compare< %compare-float ;
|
|||
{
|
||||
[ label>> lookup-label ]
|
||||
[ cc>> ]
|
||||
[ src1>> register ]
|
||||
[ src2>> ?register ]
|
||||
[ src1>> ]
|
||||
[ src2>> ]
|
||||
} cleave ; inline
|
||||
|
||||
M: _compare-branch generate-insn
|
||||
|
|
|
|||
Loading…
Reference in New Issue