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compiler.cfg.*: more docs

db4
Björn Lindqvist 2014-12-15 04:07:37 +01:00
parent c810677b47
commit 8a011c8366
5 changed files with 33 additions and 10 deletions
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17
basis/compiler/cfg/linear-scan/allocation/state/state-docs.factor
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@ -1,7 +1,20 @@
USING: assocs compiler.cfg compiler.cfg.instructions cpu.architecture
help.markup help.syntax math ;
USING: assocs compiler.cfg compiler.cfg.instructions
compiler.cfg.linear-scan.live-intervals cpu.architecture heaps help.markup
help.syntax math vectors ;
IN: compiler.cfg.linear-scan.allocation.state
HELP: active-intervals
{ $var-description { $link assoc } " of active live intervals. The keys are register class symbols and the values vectors of " { $link live-interval-state } "." } ;
HELP: handled-intervals
{ $var-description { $link vector } " of handled live intervals." } ;
HELP: unhandled-intervals
{ $var-description { $link min-heap } " of live intervals which still need a register allocation." } ;
HELP: unhandled-sync-points
{ $var-description { $link min-heap } " of sync points which still need to be processed." } ;
HELP: init-allocator
{ $values { "registers" { $link assoc } " mapping from register class to available machine registers." } }
{ $description "Initializes the state for the register allocator." }

2
basis/compiler/cfg/linear-scan/allocation/state/state.factor
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@ -31,7 +31,6 @@ SYMBOL: progress
! Mapping from register classes to sequences of machine registers
SYMBOL: registers
! Vector of active live intervals
SYMBOL: active-intervals
: active-intervals-for ( live-interval -- seq )
@ -58,7 +57,6 @@ SYMBOL: inactive-intervals
: delete-inactive ( live-interval -- )
dup inactive-intervals-for remove-eq! drop ;
! Vector of handled live intervals
SYMBOL: handled-intervals
: add-handled ( live-interval -- )

16
basis/compiler/cfg/linear-scan/live-intervals/live-intervals-docs.factor
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@ -1,6 +1,20 @@
USING: help.markup help.syntax ;
USING: compiler.cfg.instructions help.markup help.syntax ;
IN: compiler.cfg.linear-scan.live-intervals
HELP: live-intervals
{ $var-description "Mapping from vreg to " { $link live-interval-state } "." } ;
HELP: sync-point
{ $class-description "A location where all registers have to be spilled. It has the following slots:"
{ $table
{ { $slot "n" } { "Set from an instructions sequence number." } }
}
}
{ $see-also insn } ;
HELP: live-interval-state
{ $class-description "A class encoding the \"liveness\" of a virtual register." } ;
HELP: <live-interval>
{ $values
{ "vreg" "virtual register" }

2
basis/compiler/cfg/linear-scan/live-intervals/live-intervals.factor
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@ -92,7 +92,6 @@ M: live-interval-state covers? ( insn# live-interval -- ? )
SYMBOLS: from to ;
! Mapping from vreg to live-interval
SYMBOL: live-intervals
: live-interval ( vreg -- live-interval )
@ -161,7 +160,6 @@ M: hairy-clobber-insn compute-live-intervals* ( insn -- )
[ live-interval add-range ] 2with each
] if ;
! A location where all registers have to be spilled
TUPLE: sync-point n keep-dst? ;
C: <sync-point> sync-point

6
basis/compiler/cfg/linearization/linearization-docs.factor
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@ -1,5 +1,5 @@
USING: compiler.cfg compiler.cfg.linearization compiler.codegen help.markup
help.syntax kernel macros math sequences ;
USING: compiler.cfg compiler.cfg.linearization compiler.cfg.rpo
compiler.codegen help.markup help.syntax kernel macros math sequences ;
IN: compiler.cfg.linearization
HELP: linearization-order
@ -8,7 +8,7 @@ HELP: linearization-order
{ "bbs" sequence }
}
{ $description "Lists the basic blocks in linearization order. That is, the order in which they will be written in the generated assembly code." }
{ $see-also generate } ;
{ $see-also generate reverse-post-order } ;
HELP: block-number
{ $values { "bb" basic-block } { "n" integer } }