compiler.cfg.linear-scan.*: more tests and docs for allocation and state
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@ -1,12 +1,17 @@
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USING: assocs compiler.cfg compiler.cfg.instructions
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USING: assocs compiler.cfg compiler.cfg.instructions
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compiler.cfg.linear-scan.allocation compiler.cfg.linear-scan.allocation.state
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compiler.cfg.linear-scan.allocation compiler.cfg.linear-scan.allocation.state
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compiler.cfg.linear-scan.live-intervals help.markup help.syntax kernel sequences ;
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compiler.cfg.linear-scan.live-intervals hashtables help.markup help.syntax
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kernel sequences ;
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IN: compiler.cfg.linear-scan.allocation
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IN: compiler.cfg.linear-scan.allocation
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HELP: (allocate-registers)
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HELP: (allocate-registers)
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{ $values { "unhandled-min-heap" "stuff" } }
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{ $values { "unhandled-min-heap" "stuff" } }
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{ $description "Register allocation works by emptying the unhandled intervals and sync points." } ;
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{ $description "Register allocation works by emptying the unhandled intervals and sync points." } ;
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HELP: active-positions
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{ $values { "new" live-interval-state } { "assoc" assoc } }
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{ $description "Looks at the " { $link active-intervals } " and sets to 0 those registers in 'assoc' that can't be used for allocation." } ;
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HELP: allocate-registers
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HELP: allocate-registers
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{ $values
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{ $values
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{ "intervals/sync-points" sequence }
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{ "intervals/sync-points" sequence }
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@ -15,6 +20,15 @@ HELP: allocate-registers
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}
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}
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{ $description "Performs register allocation of a " { $link sequence } " of live intervals. Each live interval is assigned a physical register and also a spill slot if it needs to be spilled." } ;
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{ $description "Performs register allocation of a " { $link sequence } " of live intervals. Each live interval is assigned a physical register and also a spill slot if it needs to be spilled." } ;
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HELP: assign-register
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{ $values { "new" live-interval-state } { "registers" assoc } }
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{ $description "Assigns a processor register to the live interval." } ;
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HELP: free-positions
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{ $values { "registers" assoc } { "reg-class" } { "avail-registers" assoc } }
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{ $description "Creates an alist mapping registers to their desirability for allocation. 'avail-registers' is an alist and not a " { $link hashtable } " because the register allocation order is significant." }
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{ $see-also register-status } ;
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HELP: handle-sync-point
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HELP: handle-sync-point
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{ $values
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{ $values
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{ "sync-point" sync-point }
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{ "sync-point" sync-point }
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@ -44,6 +44,26 @@ cpu x86.64? [
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interval-[30,60] add-active
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interval-[30,60] add-active
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interval-[30,46] machine-registers register-status
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interval-[30,46] machine-registers register-status
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] unit-test
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] unit-test
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! free-positions
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{
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{
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{ RAX 1/0. }
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{ RCX 1/0. }
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{ RDX 1/0. }
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{ RBX 1/0. }
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{ RBP 1/0. }
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{ RSI 1/0. }
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{ RDI 1/0. }
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{ R8 1/0. }
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{ R9 1/0. }
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{ R10 1/0. }
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{ R11 1/0. }
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{ R12 1/0. }
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}
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} [
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machine-registers int-regs free-positions
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] unit-test
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] when
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] when
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! handle-sync-point
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! handle-sync-point
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@ -8,8 +8,7 @@ heaps kernel locals math namespaces sequences ;
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IN: compiler.cfg.linear-scan.allocation
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IN: compiler.cfg.linear-scan.allocation
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: active-positions ( new assoc -- )
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: active-positions ( new assoc -- )
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[ active-intervals-for ] dip
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swap active-intervals-for [ reg>> 0 2array ] map assoc-union! drop ;
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'[ [ 0 ] dip reg>> _ add-use-position ] each ;
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: inactive-positions ( new assoc -- )
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: inactive-positions ( new assoc -- )
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[ [ inactive-intervals-for ] keep ] dip
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[ [ inactive-intervals-for ] keep ] dip
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@ -33,14 +33,6 @@ HELP: deactivate-intervals
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{ $values { "n" integer } }
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{ $values { "n" integer } }
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{ $description "Any active intervals which have ended are moved to handled. Any active intervals which cover the current position are moved to inactive." } ;
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{ $description "Any active intervals which have ended are moved to handled. Any active intervals which cover the current position are moved to inactive." } ;
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HELP: free-positions
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{ $values
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{ "registers" assoc }
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{ "reg-class" reg-class }
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{ "assoc" assoc }
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}
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{ $description "Returns an assoc with the registers that can be used by the live interval. A utility used by " { $link register-status } " word." } ;
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HELP: handled-intervals
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HELP: handled-intervals
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{ $var-description { $link vector } " of handled live intervals. This variable I think is only used during the " { $link allocate-registers } " step." } ;
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{ $var-description { $link vector } " of handled live intervals. This variable I think is only used during the " { $link allocate-registers } " step." } ;
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@ -1,5 +1,6 @@
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USING: accessors arrays assocs combinators.extras compiler.cfg
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USING: accessors arrays assocs combinators.extras compiler.cfg
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compiler.cfg.instructions compiler.cfg.linear-scan.allocation.state
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compiler.cfg.instructions compiler.cfg.linear-scan.allocation
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compiler.cfg.linear-scan.allocation.state
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compiler.cfg.linear-scan.live-intervals compiler.cfg.utilities cpu.architecture
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compiler.cfg.linear-scan.live-intervals compiler.cfg.utilities cpu.architecture
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cpu.x86.assembler.operands heaps kernel layouts namespaces sequences system
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cpu.x86.assembler.operands heaps kernel layouts namespaces sequences system
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tools.test ;
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tools.test ;
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@ -37,7 +38,7 @@ IN: compiler.cfg.linear-scan.allocation.state.tests
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! add-use-position
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! add-use-position
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cpu x86.64? [
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cpu x86.64? [
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{
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{
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H{
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{
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{ XMM0 1/0. }
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{ XMM0 1/0. }
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{ XMM1 25 }
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{ XMM1 25 }
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{ XMM2 1/0. }
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{ XMM2 1/0. }
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{ XMM7 1/0. }
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{ XMM7 1/0. }
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{ XMM8 1/0. }
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{ XMM8 1/0. }
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{ XMM9 1/0. }
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{ XMM9 1/0. }
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{ XMM11 1/0. }
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{ XMM10 1/0. }
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{ XMM10 1/0. }
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{ XMM13 1/0. }
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{ XMM11 1/0. }
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{ XMM12 1/0. }
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{ XMM12 1/0. }
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{ XMM15 1/0. }
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{ XMM13 1/0. }
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{ XMM14 1/0. }
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{ XMM14 1/0. }
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{ XMM15 1/0. }
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}
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}
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} [
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} [
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25 XMM1 machine-registers float-regs free-positions
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25 XMM1 machine-registers float-regs free-positions
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] unit-test
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] unit-test
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] when
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] when
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! add-use-position
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{ { { "prutt" 12 } } } [
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30 "prutt" { { "prutt" 12 } } [ add-use-position ] keep
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] unit-test
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! assign-spill-slot
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! assign-spill-slot
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cpu x86.32?
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cpu x86.32?
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H{
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H{
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check-handled
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check-handled
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] unit-test
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] unit-test
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! free-positions
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cpu x86.64? [
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{
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H{
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{ RCX 1/0. }
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{ RBX 1/0. }
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{ RAX 1/0. }
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{ R12 1/0. }
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{ RDI 1/0. }
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{ R10 1/0. }
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{ RSI 1/0. }
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{ R11 1/0. }
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{ R8 1/0. }
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{ R9 1/0. }
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{ RDX 1/0. }
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{ RBP 1/0. }
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}
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} [
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machine-registers int-regs free-positions
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] unit-test
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] when
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! align-spill-area
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! align-spill-area
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{ t } [
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{ t } [
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3 f f { } 0 insns>block <cfg> [ align-spill-area ] keep
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3 f f { } 0 insns>block <cfg> [ align-spill-area ] keep
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spill-area-align>> cell =
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spill-area-align>> cell =
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] unit-test
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] unit-test
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! inactive-intervals-for
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{
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V{ T{ live-interval-state { reg-class int-regs } { vreg 123 } } }
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} [
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f machine-registers init-allocator
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T{ live-interval-state { reg-class int-regs } { vreg 123 } }
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[ add-inactive ] keep inactive-intervals-for
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] unit-test
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! interval/sync-point-key
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{ { 33 1/0.0 1/0.0 } } [
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T{ sync-point { n 33 } } interval/sync-point-key
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] unit-test
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! next-spill-slot
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{
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{
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T{ spill-slot f 0 }
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T{ spill-slot f 0 }
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T{ spill-slot f 8 }
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T{ spill-slot f 8 }
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@ -137,10 +136,7 @@ cpu x86.64? [
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cfg get
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cfg get
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] unit-test
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] unit-test
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{ { 33 1/0.0 1/0.0 } } [
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! >unhandled-min-heap
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T{ sync-point { n 33 } } interval/sync-point-key
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] unit-test
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{
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{
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{
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{
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{ { 5 1/0. 1/0. } T{ sync-point { n 5 } } }
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{ { 5 1/0. 1/0. } T{ sync-point { n 5 } } }
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