%compare-vector instruction (only does v= for now)

basis/compiler/cfg/instructions/instructions.factor

@@ -297,6 +297,11 @@ def: dst
 use: src
 literal: shuffle rep ;
 
+PURE-INSN: ##compare-vector
+def: dst
+use: src1 src2
+literal: rep cc ;
+
 PURE-INSN: ##add-vector
 def: dst
 use: src1 src2

basis/compiler/cfg/intrinsics/intrinsics.factor

@@ -171,6 +171,7 @@ IN: compiler.cfg.intrinsics
         { math.vectors.simd.intrinsics:(simd-vbitandn) [ [ ^^andn-vector ] emit-binary-vector-op ] }
         { math.vectors.simd.intrinsics:(simd-vbitor) [ [ ^^or-vector ] emit-binary-vector-op ] }
         { math.vectors.simd.intrinsics:(simd-vbitxor) [ [ ^^xor-vector ] emit-binary-vector-op ] }
+        { math.vectors.simd.intrinsics:(simd-v=) [ [ cc= ^^compare-vector ] emit-binary-vector-op ] }
         { math.vectors.simd.intrinsics:(simd-vlshift) [ [ ^^shl-vector ] emit-binary-vector-op ] }
         { math.vectors.simd.intrinsics:(simd-vrshift) [ [ ^^shr-vector ] emit-binary-vector-op ] }
         { math.vectors.simd.intrinsics:(simd-hlshift) [ [ ^^horizontal-shl-vector ] emit-horizontal-shift ] }

basis/compiler/codegen/codegen.factor

@@ -166,6 +166,7 @@ CODEGEN: ##zero-vector %zero-vector
 CODEGEN: ##gather-vector-2 %gather-vector-2
 CODEGEN: ##gather-vector-4 %gather-vector-4
 CODEGEN: ##shuffle-vector %shuffle-vector
+CODEGEN: ##compare-vector %compare-vector
 CODEGEN: ##box-vector %box-vector
 CODEGEN: ##add-vector %add-vector
 CODEGEN: ##saturated-add-vector %saturated-add-vector

basis/compiler/tree/propagation/simd/simd.factor

@@ -25,6 +25,7 @@ IN: compiler.tree.propagation.simd
     (simd-hlshift)
     (simd-hrshift)
     (simd-vshuffle)
+    (simd-v=)
     (simd-with)
     (simd-gather-2)
     (simd-gather-4)

basis/cpu/architecture/architecture.factor

@@ -223,6 +223,7 @@ HOOK: %zero-vector cpu ( dst rep -- )
 HOOK: %gather-vector-2 cpu ( dst src1 src2 rep -- )
 HOOK: %gather-vector-4 cpu ( dst src1 src2 src3 src4 rep -- )
 HOOK: %shuffle-vector cpu ( dst src shuffle rep -- )
+HOOK: %compare-vector cpu ( dst src1 src2 rep cc -- )
 HOOK: %add-vector cpu ( dst src1 src2 rep -- )
 HOOK: %saturated-add-vector cpu ( dst src1 src2 rep -- )
 HOOK: %add-sub-vector cpu ( dst src1 src2 rep -- )
@@ -256,6 +257,7 @@ HOOK: %zero-vector-reps cpu ( -- reps )
 HOOK: %gather-vector-2-reps cpu ( -- reps )
 HOOK: %gather-vector-4-reps cpu ( -- reps )
 HOOK: %shuffle-vector-reps cpu ( -- reps )
+HOOK: %compare-vector-reps cpu ( -- reps )
 HOOK: %add-vector-reps cpu ( -- reps )
 HOOK: %saturated-add-vector-reps cpu ( -- reps )
 HOOK: %add-sub-vector-reps cpu ( -- reps )

basis/cpu/ppc/ppc.factor

@@ -267,6 +267,7 @@ M: ppc %zero-vector-reps { } ;
 M: ppc %gather-vector-2-reps { } ;
 M: ppc %gather-vector-4-reps { } ;
 M: ppc %shuffle-vector-reps { } ;
+M: ppc %compare-vector-reps { } ;
 M: ppc %add-vector-reps { } ;
 M: ppc %saturated-add-vector-reps { } ;
 M: ppc %add-sub-vector-reps { } ;

basis/cpu/x86/x86.factor

@@ -725,6 +725,28 @@ M: x86 %shuffle-vector-reps
         { sse2? { double-2-rep int-4-rep uint-4-rep longlong-2-rep ulonglong-2-rep } }
     } available-reps ;
 
+: %compare-vector-equal ( dst src rep -- )
+    unsign-rep {
+        { double-2-rep   [ CMPEQPD ] }
+        { float-4-rep    [ CMPEQPS ] }
+        { longlong-2-rep [ PCMPEQQ ] }
+        { int-4-rep      [ PCMPEQD ] }
+        { short-8-rep    [ PCMPEQW ] }
+        { char-16-rep    [ PCMPEQB ] }
+    } case ;
+
+M: x86 %compare-vector ( dst src1 src2 rep cc -- )
+    [ [ two-operand ] keep ] dip {
+        { cc= [ %compare-vector-equal ] }
+    } case ;
+
+M: x86 %compare-vector-reps
+    {
+        { sse? { float-4-rep } }
+        { sse2? { double-2-rep char-16-rep uchar-16-rep short-8-rep ushort-8-rep int-4-rep uint-4-rep } }
+        { sse4.1? { longlong-2-rep ulonglong-2-rep } }
+    } available-reps ;
+
 M: x86 %add-vector ( dst src1 src2 rep -- )
     [ two-operand ] keep
     {

basis/math/vectors/simd/intrinsics/intrinsics.factor

@@ -49,6 +49,7 @@ SIMD-OP: vrshift
 SIMD-OP: hlshift
 SIMD-OP: hrshift
 SIMD-OP: vshuffle
+SIMD-OP: v=
 
 : (simd-with) ( x rep -- v ) bad-simd-call ;
 : (simd-gather-2) ( a b rep -- v ) bad-simd-call ;
@@ -126,6 +127,7 @@ M: vector-rep supported-simd-op?
         { \ (simd-hlshift)  [ %horizontal-shl-vector-reps ] }
         { \ (simd-hrshift)  [ %horizontal-shr-vector-reps ] }
         { \ (simd-vshuffle) [ %shuffle-vector-reps        ] }
+        { \ (simd-v=)       [ %compare-vector-reps        ] }
         { \ (simd-gather-2) [ %gather-vector-2-reps       ] }
         { \ (simd-gather-4) [ %gather-vector-4-reps       ] }
     } case member? ;

basis/math/vectors/specialization/specialization.factor

@@ -92,6 +92,7 @@ H{
     { hrshift { +vector+ +literal+ -> +vector+ } }
     { vshuffle { +vector+ +literal+ -> +vector+ } }
     { vbroadcast { +vector+ +literal+ -> +vector+ } }
+    { v= { +vector+ +vector+ -> +vector+ } }
 }
 
 PREDICATE: vector-word < word vector-words key? ;