math.vectors.simd.intrinsics: (simd-vshuffle2-elements) intrinsic that creates a vector by selecting elements from two input vectors. use ##shuffle-vector-halves-imm to implement for double-2s with SSE
Joe Groff
parent
3766abd65e
commit
9f9e145819
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@ -22,6 +22,7 @@ M: ##gather-vector-4 insn-available? rep>> %gather-vector-4-reps member? ;
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M: ##store-memory-imm insn-available? rep>> %alien-vector-reps member? ;
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M: ##shuffle-vector insn-available? rep>> %shuffle-vector-reps member? ;
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M: ##shuffle-vector-imm insn-available? rep>> %shuffle-vector-imm-reps member? ;
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M: ##shuffle-vector-halves-imm insn-available? rep>> %shuffle-vector-halves-imm-reps member? ;
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M: ##merge-vector-head insn-available? rep>> %merge-vector-reps member? ;
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M: ##merge-vector-tail insn-available? rep>> %merge-vector-reps member? ;
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M: ##signed-pack-vector insn-available? rep>> %signed-pack-vector-reps member? ;
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@ -84,6 +85,8 @@ MACRO: v-vector-op ( trials -- )
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[ 1 2 >vector-op-cond ] map '[ f f _ cond ] ;
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MACRO: vl-vector-op ( trials -- )
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[ 1 3 >vector-op-cond ] map '[ f f _ cond ] ;
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MACRO: vvl-vector-op ( trials -- )
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[ 1 4 >vector-op-cond ] map '[ f f _ cond ] ;
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MACRO: vv-vector-op ( trials -- )
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[ 1 3 >vector-op-cond ] map '[ f f _ cond ] ;
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MACRO: vv-cc-vector-op ( trials -- )
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@ -118,9 +121,10 @@ MACRO: if-literals-match ( quots -- )
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] [ 2drop bad-simd-intrinsic ] if
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] ;
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CONSTANT: [unary] [ ds-drop ds-pop ]
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CONSTANT: [unary/param] [ [ -2 inc-d ds-pop ] dip ]
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CONSTANT: [binary] [ ds-drop 2inputs ]
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CONSTANT: [unary] [ ds-drop ds-pop ]
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CONSTANT: [unary/param] [ [ -2 inc-d ds-pop ] dip ]
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CONSTANT: [binary] [ ds-drop 2inputs ]
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CONSTANT: [binary/param] [ [ -2 inc-d 2inputs ] dip ]
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CONSTANT: [quaternary]
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[
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ds-drop
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@ -141,6 +145,8 @@ MACRO: emit-vl-vector-op ( trials literal-pred -- )
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[ [unary/param] [ vl-vector-op ] { [ representation? ] } ] dip prefix [emit-vector-op] ;
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MACRO: emit-vv-vector-op ( trials -- )
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[binary] [ vv-vector-op ] { [ representation? ] } [emit-vector-op] ;
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MACRO: emit-vvl-vector-op ( trials literal-pred -- )
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[ [binary/param] [ vvl-vector-op ] { [ representation? ] } ] dip prefix [emit-vector-op] ;
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MACRO: emit-vvvv-vector-op ( trials -- )
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[quaternary] [ vvvv-vector-op ] { [ representation? ] } [emit-vector-op] ;
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@ -275,6 +275,26 @@ PREDICATE: fixnum-vector-rep < int-vector-rep
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[ [ ^load-immediate-shuffle ] [ ^^shuffle-vector ] bi ]
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} vl-vector-op ;
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: ^shuffle-2-vectors-imm ( src1 src2 shuffle rep -- dst )
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[ rep-length 0 pad-tail ] keep {
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{ double-2-rep [| src1 src2 shuffle rep |
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shuffle first2 :> ( i j )
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{
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{ [ i j [ 2 < ] both? ] [
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src1 shuffle rep ^shuffle-vector-imm
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] }
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{ [ i j [ 2 >= ] both? ] [
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src2 shuffle [ 2 - ] map rep ^shuffle-vector-imm
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] }
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{ [ i 2 < ] [
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src1 src2 i j 2 - 2array rep ^^shuffle-vector-halves-imm
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] }
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! [ j 2 < ]
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[ src2 src1 i 2 - j 2array rep ^^shuffle-vector-halves-imm ]
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} cond
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] }
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} vvl-vector-op ;
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: ^broadcast-vector ( src n rep -- dst )
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[ rep-length swap <array> ] keep
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^shuffle-vector-imm ;
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@ -475,6 +495,11 @@ PREDICATE: fixnum-vector-rep < int-vector-rep
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[ ^shuffle-vector-imm ]
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} [ shuffle? ] emit-vl-vector-op ;
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: emit-simd-vshuffle2-elements ( node -- )
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{
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[ ^shuffle-2-vectors-imm ]
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} [ shuffle? ] emit-vvl-vector-op ;
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: emit-simd-vshuffle-bytes ( node -- )
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{
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[ ^^shuffle-vector ]
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@ -605,65 +630,66 @@ PREDICATE: fixnum-vector-rep < int-vector-rep
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: enable-simd ( -- )
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{
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{ (simd-v+) [ emit-simd-v+ ] }
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{ (simd-v-) [ emit-simd-v- ] }
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{ (simd-vneg) [ emit-simd-vneg ] }
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{ (simd-v+-) [ emit-simd-v+- ] }
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{ (simd-vs+) [ emit-simd-vs+ ] }
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{ (simd-vs-) [ emit-simd-vs- ] }
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{ (simd-vs*) [ emit-simd-vs* ] }
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{ (simd-v*) [ emit-simd-v* ] }
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{ (simd-v*high) [ emit-simd-v*high ] }
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{ (simd-v*hs+) [ emit-simd-v*hs+ ] }
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{ (simd-v/) [ emit-simd-v/ ] }
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{ (simd-vmin) [ emit-simd-vmin ] }
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{ (simd-vmax) [ emit-simd-vmax ] }
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{ (simd-vavg) [ emit-simd-vavg ] }
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{ (simd-v.) [ emit-simd-v. ] }
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{ (simd-vsad) [ emit-simd-vsad ] }
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{ (simd-vsqrt) [ emit-simd-vsqrt ] }
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{ (simd-sum) [ emit-simd-sum ] }
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{ (simd-vabs) [ emit-simd-vabs ] }
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{ (simd-vbitand) [ emit-simd-vand ] }
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{ (simd-vbitandn) [ emit-simd-vandn ] }
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{ (simd-vbitor) [ emit-simd-vor ] }
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{ (simd-vbitxor) [ emit-simd-vxor ] }
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{ (simd-vbitnot) [ emit-simd-vnot ] }
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{ (simd-vand) [ emit-simd-vand ] }
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{ (simd-vandn) [ emit-simd-vandn ] }
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{ (simd-vor) [ emit-simd-vor ] }
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{ (simd-vxor) [ emit-simd-vxor ] }
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{ (simd-vnot) [ emit-simd-vnot ] }
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{ (simd-vlshift) [ emit-simd-vlshift ] }
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{ (simd-vrshift) [ emit-simd-vrshift ] }
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{ (simd-hlshift) [ emit-simd-hlshift ] }
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{ (simd-hrshift) [ emit-simd-hrshift ] }
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{ (simd-vshuffle-elements) [ emit-simd-vshuffle-elements ] }
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{ (simd-vshuffle-bytes) [ emit-simd-vshuffle-bytes ] }
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{ (simd-vmerge-head) [ emit-simd-vmerge-head ] }
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{ (simd-vmerge-tail) [ emit-simd-vmerge-tail ] }
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{ (simd-v<=) [ emit-simd-v<= ] }
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{ (simd-v<) [ emit-simd-v< ] }
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{ (simd-v=) [ emit-simd-v= ] }
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{ (simd-v>) [ emit-simd-v> ] }
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{ (simd-v>=) [ emit-simd-v>= ] }
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{ (simd-vunordered?) [ emit-simd-vunordered? ] }
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{ (simd-vany?) [ emit-simd-vany? ] }
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{ (simd-vall?) [ emit-simd-vall? ] }
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{ (simd-vnone?) [ emit-simd-vnone? ] }
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{ (simd-v>float) [ emit-simd-v>float ] }
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{ (simd-v>integer) [ emit-simd-v>integer ] }
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{ (simd-vpack-signed) [ emit-simd-vpack-signed ] }
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{ (simd-vpack-unsigned) [ emit-simd-vpack-unsigned ] }
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{ (simd-vunpack-head) [ emit-simd-vunpack-head ] }
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{ (simd-vunpack-tail) [ emit-simd-vunpack-tail ] }
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{ (simd-with) [ emit-simd-with ] }
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{ (simd-gather-2) [ emit-simd-gather-2 ] }
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{ (simd-gather-4) [ emit-simd-gather-4 ] }
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{ (simd-select) [ emit-simd-select ] }
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{ alien-vector [ emit-alien-vector ] }
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{ set-alien-vector [ emit-set-alien-vector ] }
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{ assert-positive [ drop ] }
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{ (simd-v+) [ emit-simd-v+ ] }
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{ (simd-v-) [ emit-simd-v- ] }
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{ (simd-vneg) [ emit-simd-vneg ] }
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{ (simd-v+-) [ emit-simd-v+- ] }
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{ (simd-vs+) [ emit-simd-vs+ ] }
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{ (simd-vs-) [ emit-simd-vs- ] }
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{ (simd-vs*) [ emit-simd-vs* ] }
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{ (simd-v*) [ emit-simd-v* ] }
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{ (simd-v*high) [ emit-simd-v*high ] }
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{ (simd-v*hs+) [ emit-simd-v*hs+ ] }
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{ (simd-v/) [ emit-simd-v/ ] }
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{ (simd-vmin) [ emit-simd-vmin ] }
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{ (simd-vmax) [ emit-simd-vmax ] }
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{ (simd-vavg) [ emit-simd-vavg ] }
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{ (simd-v.) [ emit-simd-v. ] }
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{ (simd-vsad) [ emit-simd-vsad ] }
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{ (simd-vsqrt) [ emit-simd-vsqrt ] }
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{ (simd-sum) [ emit-simd-sum ] }
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{ (simd-vabs) [ emit-simd-vabs ] }
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{ (simd-vbitand) [ emit-simd-vand ] }
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{ (simd-vbitandn) [ emit-simd-vandn ] }
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{ (simd-vbitor) [ emit-simd-vor ] }
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{ (simd-vbitxor) [ emit-simd-vxor ] }
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{ (simd-vbitnot) [ emit-simd-vnot ] }
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{ (simd-vand) [ emit-simd-vand ] }
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{ (simd-vandn) [ emit-simd-vandn ] }
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{ (simd-vor) [ emit-simd-vor ] }
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{ (simd-vxor) [ emit-simd-vxor ] }
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{ (simd-vnot) [ emit-simd-vnot ] }
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{ (simd-vlshift) [ emit-simd-vlshift ] }
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{ (simd-vrshift) [ emit-simd-vrshift ] }
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{ (simd-hlshift) [ emit-simd-hlshift ] }
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{ (simd-hrshift) [ emit-simd-hrshift ] }
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{ (simd-vshuffle-elements) [ emit-simd-vshuffle-elements ] }
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{ (simd-vshuffle2-elements) [ emit-simd-vshuffle2-elements ] }
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{ (simd-vshuffle-bytes) [ emit-simd-vshuffle-bytes ] }
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{ (simd-vmerge-head) [ emit-simd-vmerge-head ] }
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{ (simd-vmerge-tail) [ emit-simd-vmerge-tail ] }
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{ (simd-v<=) [ emit-simd-v<= ] }
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{ (simd-v<) [ emit-simd-v< ] }
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{ (simd-v=) [ emit-simd-v= ] }
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{ (simd-v>) [ emit-simd-v> ] }
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{ (simd-v>=) [ emit-simd-v>= ] }
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{ (simd-vunordered?) [ emit-simd-vunordered? ] }
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{ (simd-vany?) [ emit-simd-vany? ] }
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{ (simd-vall?) [ emit-simd-vall? ] }
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{ (simd-vnone?) [ emit-simd-vnone? ] }
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{ (simd-v>float) [ emit-simd-v>float ] }
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{ (simd-v>integer) [ emit-simd-v>integer ] }
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{ (simd-vpack-signed) [ emit-simd-vpack-signed ] }
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{ (simd-vpack-unsigned) [ emit-simd-vpack-unsigned ] }
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{ (simd-vunpack-head) [ emit-simd-vunpack-head ] }
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{ (simd-vunpack-tail) [ emit-simd-vunpack-tail ] }
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{ (simd-with) [ emit-simd-with ] }
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{ (simd-gather-2) [ emit-simd-gather-2 ] }
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{ (simd-gather-4) [ emit-simd-gather-4 ] }
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{ (simd-select) [ emit-simd-select ] }
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{ alien-vector [ emit-alien-vector ] }
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{ set-alien-vector [ emit-set-alien-vector ] }
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{ assert-positive [ drop ] }
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} enable-intrinsics ;
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enable-simd
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@ -186,6 +186,8 @@ PRIVATE>
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: (simd-hrshift) ( a n rep -- c )
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drop tail-slice 16 0 pad-tail ;
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: (simd-vshuffle-elements) ( a n rep -- c ) [ rep-length 0 pad-tail ] keep (vshuffle) ;
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: (simd-vshuffle2-elements) ( a b n rep -- c )
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[ cord-append ] 2dip [ rep-length 0 pad-tail ] keep (vshuffle) ;
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: (simd-vshuffle-bytes) ( a b rep -- c ) drop uchar-16-rep (vshuffle) ;
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:: (simd-vmerge-head) ( a b rep -- c )
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a b rep 2>rep-array :> ( a' b' )
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@ -252,4 +254,3 @@ PRIVATE>
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"compiler.cfg.intrinsics.simd" require
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"compiler.tree.propagation.simd" require
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"compiler.cfg.value-numbering.simd" require
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