compiler.cfg.linear-scan: fix fencepost error in spill insertion
Slava Pestov
parent
11347e784c
commit
ae67de6f90
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@ -17,7 +17,7 @@ ERROR: bad-live-ranges interval ;
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] [ drop ] if ;
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: trim-before-ranges ( live-interval -- )
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[ ranges>> ] [ uses>> last ] bi
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[ ranges>> ] [ uses>> last 1 + ] bi
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[ '[ from>> _ <= ] filter-here ]
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[ swap last (>>to) ]
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2bi ;
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@ -107,7 +107,7 @@ SYMBOL: check-assignment?
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ERROR: overlapping-registers intervals ;
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: check-assignment ( intervals -- )
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dup [ copy-from>> ] map sift [ vreg>> ] map '[ vreg>> _ member? not ] filter
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dup [ copy-from>> ] map sift '[ vreg>> _ member? not ] filter
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dup [ reg>> ] map all-unique? [ drop ] [ overlapping-registers ] if ;
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: active-intervals ( n -- intervals )
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@ -150,7 +150,7 @@ ERROR: bad-live-values live-values ;
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: begin-block ( bb -- )
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dup basic-block set
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dup block-from prepare-insn
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dup block-from activate-new-intervals
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[ [ live-in ] [ block-from ] bi compute-live-values ] keep
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register-live-ins get set-at ;
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@ -82,9 +82,9 @@ check-numbering? on
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T{ live-interval
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{ vreg T{ vreg { reg-class int-regs } { n 1 } } }
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{ start 0 }
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{ end 1 }
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{ end 2 }
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{ uses V{ 0 1 } }
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{ ranges V{ T{ live-range f 0 1 } } }
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{ ranges V{ T{ live-range f 0 2 } } }
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}
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T{ live-interval
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{ vreg T{ vreg { reg-class int-regs } { n 1 } } }
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@ -107,9 +107,9 @@ check-numbering? on
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T{ live-interval
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{ vreg T{ vreg { reg-class int-regs } { n 1 } } }
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{ start 0 }
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{ end 0 }
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{ end 1 }
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{ uses V{ 0 } }
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{ ranges V{ T{ live-range f 0 0 } } }
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{ ranges V{ T{ live-range f 0 1 } } }
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}
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T{ live-interval
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{ vreg T{ vreg { reg-class int-regs } { n 1 } } }
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@ -132,9 +132,9 @@ check-numbering? on
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T{ live-interval
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{ vreg T{ vreg { reg-class int-regs } { n 1 } } }
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{ start 0 }
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{ end 0 }
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{ end 1 }
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{ uses V{ 0 } }
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{ ranges V{ T{ live-range f 0 0 } } }
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{ ranges V{ T{ live-range f 0 1 } } }
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}
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T{ live-interval
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{ vreg T{ vreg { reg-class int-regs } { n 1 } } }
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@ -1317,38 +1317,6 @@ USING: math.private ;
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allocate-registers drop
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] unit-test
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! Spill slot liveness was computed incorrectly, leading to a FEP
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! early in bootstrap on x86-32
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[ t ] [
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[
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H{ } clone live-ins set
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H{ } clone live-outs set
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H{ } clone phi-live-ins set
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T{ basic-block
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{ id 12345 }
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{ instructions
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V{
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T{ ##gc f V int-regs 6 V int-regs 7 }
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T{ ##peek f V int-regs 0 D 0 }
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T{ ##peek f V int-regs 1 D 1 }
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T{ ##peek f V int-regs 2 D 2 }
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T{ ##peek f V int-regs 3 D 3 }
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T{ ##peek f V int-regs 4 D 4 }
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T{ ##peek f V int-regs 5 D 5 }
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T{ ##replace f V int-regs 0 D 1 }
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T{ ##replace f V int-regs 1 D 2 }
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T{ ##replace f V int-regs 2 D 3 }
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T{ ##replace f V int-regs 3 D 4 }
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T{ ##replace f V int-regs 4 D 5 }
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T{ ##replace f V int-regs 5 D 0 }
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}
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}
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} dup 1array { { int-regs V{ 0 1 2 3 } } } (linear-scan)
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instructions>> first
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live-values>> assoc-empty?
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] with-scope
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] unit-test
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[ f ] [
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T{ live-range f 0 10 }
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T{ live-range f 20 30 }
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@ -2482,4 +2450,161 @@ V{
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7 get 9 get 1vector >>successors drop
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8 get 9 get 1vector >>successors drop
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[ ] [ { 1 2 3 4 5 } test-linear-scan-on-cfg ] unit-test
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[ ] [ { 1 2 3 4 5 } test-linear-scan-on-cfg ] unit-test
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! Fencepost error in assignment pass
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V{ T{ ##branch } } 0 test-bb
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V{
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T{ ##peek f V int-regs 0 D 0 }
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T{ ##compare-imm-branch f V int-regs 0 5 cc= }
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} 1 test-bb
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V{ T{ ##branch } } 2 test-bb
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V{
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T{ ##peek f V int-regs 1 D 0 }
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T{ ##peek f V int-regs 2 D 0 }
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T{ ##replace f V int-regs 1 D 0 }
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T{ ##replace f V int-regs 2 D 0 }
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T{ ##branch }
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} 3 test-bb
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V{
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T{ ##replace f V int-regs 0 D 0 }
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T{ ##return }
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} 4 test-bb
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test-diamond
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[ ] [ { 1 2 } test-linear-scan-on-cfg ] unit-test
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[ 0 ] [ 1 get instructions>> [ _spill? ] count ] unit-test
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[ 1 ] [ 2 get instructions>> [ _spill? ] count ] unit-test
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[ 1 ] [ 3 get instructions>> [ _spill? ] count ] unit-test
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[ 1 ] [ 4 get instructions>> [ _reload? ] count ] unit-test
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! Another test case for fencepost error in assignment pass
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V{ T{ ##branch } } 0 test-bb
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V{
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T{ ##peek f V int-regs 0 D 0 }
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T{ ##compare-imm-branch f V int-regs 0 5 cc= }
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} 1 test-bb
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V{
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T{ ##peek f V int-regs 1 D 0 }
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T{ ##peek f V int-regs 2 D 0 }
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T{ ##replace f V int-regs 1 D 0 }
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T{ ##replace f V int-regs 2 D 0 }
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T{ ##replace f V int-regs 0 D 0 }
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T{ ##branch }
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} 2 test-bb
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V{
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T{ ##branch }
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} 3 test-bb
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V{
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T{ ##replace f V int-regs 0 D 0 }
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T{ ##return }
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} 4 test-bb
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test-diamond
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[ ] [ { 1 2 } test-linear-scan-on-cfg ] unit-test
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[ 0 ] [ 1 get instructions>> [ _spill? ] count ] unit-test
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[ 1 ] [ 2 get instructions>> [ _spill? ] count ] unit-test
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[ 1 ] [ 2 get instructions>> [ _reload? ] count ] unit-test
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[ 0 ] [ 3 get instructions>> [ _spill? ] count ] unit-test
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[ 0 ] [ 4 get instructions>> [ _reload? ] count ] unit-test
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! GC check tests
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! Spill slot liveness was computed incorrectly, leading to a FEP
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! early in bootstrap on x86-32
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[ t ] [
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[
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H{ } clone live-ins set
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H{ } clone live-outs set
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H{ } clone phi-live-ins set
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T{ basic-block
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{ id 12345 }
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{ instructions
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V{
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T{ ##gc f V int-regs 6 V int-regs 7 }
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T{ ##peek f V int-regs 0 D 0 }
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T{ ##peek f V int-regs 1 D 1 }
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T{ ##peek f V int-regs 2 D 2 }
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T{ ##peek f V int-regs 3 D 3 }
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T{ ##peek f V int-regs 4 D 4 }
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T{ ##peek f V int-regs 5 D 5 }
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T{ ##replace f V int-regs 0 D 1 }
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T{ ##replace f V int-regs 1 D 2 }
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T{ ##replace f V int-regs 2 D 3 }
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T{ ##replace f V int-regs 3 D 4 }
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T{ ##replace f V int-regs 4 D 5 }
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T{ ##replace f V int-regs 5 D 0 }
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}
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}
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} dup 1array { { int-regs V{ 0 1 2 3 } } } (linear-scan)
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instructions>> first
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live-values>> assoc-empty?
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] with-scope
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] unit-test
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V{
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T{ ##peek f V int-regs 0 D 0 }
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T{ ##peek f V int-regs 1 D 1 }
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T{ ##replace f V int-regs 1 D 1 }
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T{ ##branch }
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} 0 test-bb
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V{
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T{ ##gc f V int-regs 2 V int-regs 3 }
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T{ ##branch }
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} 1 test-bb
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V{
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T{ ##replace f V int-regs 0 D 0 }
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T{ ##return }
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} 2 test-bb
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0 get 1 get 1vector >>successors drop
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1 get 2 get 1vector >>successors drop
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[ ] [ { 1 2 3 } test-linear-scan-on-cfg ] unit-test
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[ H{ { V int-regs 0 3 } } ] [ 1 get instructions>> first live-values>> ] unit-test
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V{
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T{ ##peek f V int-regs 0 D 0 }
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T{ ##peek f V int-regs 1 D 1 }
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T{ ##compare-imm-branch f V int-regs 1 5 cc= }
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} 0 test-bb
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V{
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T{ ##gc f V int-regs 2 V int-regs 3 }
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T{ ##replace f V int-regs 0 D 0 }
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T{ ##return }
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} 1 test-bb
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V{
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T{ ##return }
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} 2 test-bb
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0 get 1 get 2 get V{ } 2sequence >>successors drop
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[ ] [ { 1 2 3 } test-linear-scan-on-cfg ] unit-test
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[ H{ { V int-regs 0 3 } } ] [ 1 get instructions>> first live-values>> ] unit-test
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