compiler.*: bunch of new docs for some compiler instructions
Björn Lindqvist
John Benediktsson
parent
a17e943e88
commit
b827bc75cc
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@ -3,60 +3,6 @@ compiler.codegen.gc-maps cpu.architecture help.markup help.syntax kernel
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layouts sequences slots.private system ;
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IN: compiler.cfg.instructions
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HELP: new-insn
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{ $values { "class" class } { "insn" insn } }
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{ $description
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"Boa wrapper for the " { $link insn } " class with " { $slot "insn#" } " set to " { $link f } "."
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} ;
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HELP: insn
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{ $class-description
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"Base class for all virtual cpu instructions, used by the CFG IR."
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} ;
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HELP: vreg-insn
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{ $class-description
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"Base class for instructions that uses vregs."
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} ;
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HELP: flushable-insn
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{ $class-description
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"Instructions which do not have side effects; used for dead code elimination." } ;
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HELP: foldable-insn
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{ $class-description
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"Instructions which are referentially transparent; used for value numbering." } ;
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HELP: ##load-reference
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{ $class-description
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"An instruction for loading a pointer to an object into a register. It has the following slots:"
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{ $table
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{ { $slot "dst" } { "Register to load the pointer into." } }
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{ { $slot "obj" } { "A Factor object." } }
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}
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} ;
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HELP: ##inc
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{ $class-description
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"An instruction that increases or decreases a stacks height by n. For example, " { $link 2drop } " decreases the datastacks height by two and pushing an item increases it by one."
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} ;
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HELP: ##prologue
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{ $class-description
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"An instruction for generating the prologue for a cfg. All it does is decrementing the stack register a number of cells to give the generated code some stack space to work with." }
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{ $see-also ##epilogue } ;
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HELP: ##allot
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{ $class-description
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"An instruction for allocating memory in the nursery. Usually the instruction is preceeded by " { $link ##check-nursery-branch } " which checks that there is enough room in the nursery to allocate. It has the following slots:"
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{ $table
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{ { $slot "dst" } { "Register to put the pointer to the memory in." } }
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{ { $slot "size" } { "Number of bytes to allocate." } }
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{ { $slot "class-of" } { "Class of object to allocate, e.g " { $link tuple } " or " { $link array } "." } }
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{ { $slot "temp" } { "Temporary register to clobber." } }
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}
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} ;
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HELP: ##alien-invoke
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{ $class-description
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"An instruction for calling a function in a dynamically linked library. It has the following slots:"
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@ -76,11 +22,21 @@ HELP: ##alien-invoke
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"Which function arguments that goes in " { $slot "reg-inputs" } " and which goes in " { $slot "stack-inputs" } " depend on the calling convention. In " { $link cdecl } " on " { $link x86.32 } ", all arguments goes in " { $slot "stack-inputs" } " but on " { $link x86.64 } " the first six arguments are passed in registers and only then are the stack used."
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} ;
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HELP: alien-call-insn
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{ $class-description "Union class of all alien call instructions." } ;
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HELP: ##allot
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{ $class-description
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"An instruction for allocating memory in the nursery. Usually the instruction is preceeded by " { $link ##check-nursery-branch } " which checks that there is enough room in the nursery to allocate. It has the following slots:"
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{ $table
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{ { $slot "dst" } { "Register to put the pointer to the memory in." } }
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{ { $slot "size" } { "Number of bytes to allocate." } }
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{ { $slot "class-of" } { "Class of object to allocate, e.g " { $link tuple } " or " { $link array } "." } }
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{ { $slot "temp" } { "Temporary register to clobber." } }
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}
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} ;
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HELP: def-is-use-insn
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{ $class-description "Union class of instructions that have complex expansions and require that the output registers are not equal to any of the input registers." } ;
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HELP: ##box-alien
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{ $class-description
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"An instruction for boxing an alien value."
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} ;
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HELP: ##call
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{ $class-description
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@ -101,10 +57,94 @@ HELP: ##check-nursery-branch
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}
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{ $see-also %check-nursery-branch } ;
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HELP: ##compare-float-ordered-branch
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{ $class-description
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"It has the following slots:"
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{ $table
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{ { $slot "cc" } { "Comparison symbol." } }
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}
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} ;
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HELP: ##compare-integer
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{ $class-description "This instruction is emitted for integer comparisons." } ;
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HELP: ##copy
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{ $class-description "Instruction that copies a value from one register to another of the same type. For example, you can copy between two gprs or two simd registers but not across. It has the following slots:"
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{ $table
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{ { $slot "rep" } { "Value representation. Both the source and destination register must have the same representation." } }
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}
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} ;
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HELP: ##inc
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{ $class-description
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"An instruction that increases or decreases a stacks height by n. For example, " { $link 2drop } " decreases the datastacks height by two and pushing an item increases it by one."
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} ;
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HELP: ##jump
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{ $class-description
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"An uncondiation jump instruction. It has the following slots:"
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{ $table
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{ { $slot "word" } { "Word whose address the instruction is jumping to." } }
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}
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"Note that the optimizer is sometimes able to optimize away a " { $link ##call } " and " { $link ##return } " pair into one ##jump instruction."
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} ;
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HELP: ##load-double
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{ $class-description "I dont know." } ;
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HELP: ##load-memory-imm
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{ $class-description "Instruction for loading data from memory into an MMS register." }
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{ $see-also %load-memory-imm } ;
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HELP: ##load-reference
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{ $class-description
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"An instruction for loading a pointer to an object into a register. It has the following slots:"
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{ $table
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{ { $slot "dst" } { "Register to load the pointer into." } }
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{ { $slot "obj" } { "A Factor object." } }
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}
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} ;
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HELP: ##mul-vector
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{ $class-description
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"SIMD instruction." } ;
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HELP: ##no-tco
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{ $class-description "A dummy instruction that simply inhibits TCO." } ;
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HELP: ##peek
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{ $class-description
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"Copies a value from a stack location to a machine register."
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}
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{ $see-also ##replace } ;
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HELP: ##phi
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{ $class-description
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"A special kind of instruction used to mark control flow. It is inserted by the " { $vocab-link "compiler.cfg.ssa.construction" } " vocab." } ;
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HELP: ##prologue
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{ $class-description
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"An instruction for generating the prologue for a cfg. All it does is decrementing the stack register a number of cells to give the generated code some stack space to work with." }
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{ $see-also ##epilogue } ;
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HELP: ##reload
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{ $class-description "Instruction that copies a value from a " { $link spill-slot } " to a register." } ;
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HELP: ##replace
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{ $class-description
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"Copies a value from a machine register to a stack location." }
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{ $see-also ##peek ##replace-imm } ;
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HELP: ##replace-imm
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{ $class-description
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"An instruction that replaces an item on the data or register stack with an " { $link immediate } " value." } ;
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HELP: ##return
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{ $class-description "Instruction that returns from a procedure call." } ;
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HELP: ##safepoint
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{ $class-description "Instruction that inserts a safe point in the generated code." } ;
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HELP: ##set-slot
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{ $class-description
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"An instruction for the non-primitive, non-immediate variant of " { $link set-slot } ". It has the following slots:"
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@ -131,6 +171,9 @@ HELP: ##set-slot-imm
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{ ##set-slot-imm %set-slot-imm } related-words
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{ ##set-slot-imm ##set-slot } related-words
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HELP: ##single>double-float
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{ $class-description "Converts a single precision value (32-bit usually) stored in a SIMD register to a double precision one (64-bit usually)." } ;
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HELP: ##slot-imm
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{ $class-description
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"Instruction for reading a slot value from an object."
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@ -142,19 +185,15 @@ HELP: ##slot-imm
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}
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} ;
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HELP: ##replace-imm
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{ $class-description
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"An instruction that replaces an item on the data or register stack with an " { $link immediate } " value." } ;
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HELP: ##spill
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{ $class-description "Instruction that copies a value from a register to a " { $link spill-slot } "." } ;
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HELP: ##replace
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{ $class-description
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"Copies a value from a machine register to a stack location." }
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{ $see-also ##peek ##replace-imm } ;
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HELP: ##store-memory-imm
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{ $class-description "Instruction that copies an 8 byte value from a XMM register to a memory location addressed by a normal register. This instruction is often turned into a cheaper " { $link ##store-memory } " instruction in the " { $link value-numbering } " pass." } ;
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HELP: ##box-alien
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{ $class-description
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"An instruction for boxing an alien value."
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} ;
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HELP: ##vector>scalar
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{ $class-description "This instruction is very similar to " { $link ##copy } "." }
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{ $see-also %vector>scalar } ;
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HELP: ##write-barrier
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{ $class-description
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@ -169,41 +208,35 @@ HELP: ##write-barrier
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}
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} ;
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HELP: ##jump
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{ $class-description
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"An uncondiation jump instruction. It has the following slots:"
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{ $table
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{ { $slot "word" } { "Word whose address the instruction is jumping to." } }
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}
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"Note that the optimizer is sometimes able to optimize away a " { $link ##call } " and " { $link ##return } " pair into one ##jump instruction."
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HELP: alien-call-insn
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{ $class-description "Union class of all alien call instructions." } ;
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HELP: def-is-use-insn
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{ $class-description "Union class of instructions that have complex expansions and require that the output registers are not equal to any of the input registers." } ;
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HELP: new-insn
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{ $values { "class" class } { "insn" insn } }
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{ $description
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"Boa wrapper for the " { $link insn } " class with " { $slot "insn#" } " set to " { $link f } "."
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} ;
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HELP: ##peek
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HELP: insn
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{ $class-description
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"Copies a value from a stack location to a machine register."
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}
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{ $see-also ##replace } ;
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"Base class for all virtual cpu instructions, used by the CFG IR."
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} ;
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HELP: ##safepoint
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{ $class-description "Instruction that inserts a safe point in the generated code." } ;
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HELP: vreg-insn
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{ $class-description
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"Base class for instructions that uses vregs."
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} ;
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HELP: ##return
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{ $class-description "Instruction that returns from a procedure call." } ;
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HELP: flushable-insn
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{ $class-description
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"Instructions which do not have side effects; used for dead code elimination." } ;
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HELP: ##no-tco
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{ $class-description "A dummy instruction that simply inhibits TCO." } ;
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HELP: ##copy
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{ $class-description "Instruction that copies a value from one register to another." } ;
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HELP: ##compare-integer
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{ $class-description "This instruction is emitted for integer comparisons." } ;
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HELP: ##spill
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{ $class-description "Instruction that copies a value from a register to a " { $link spill-slot } "." } ;
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HELP: ##store-memory-imm
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{ $class-description "Instruction that copies an 8 byte value from a XMM register to a memory location addressed by a normal register. This instruction is often turned into a cheaper " { $link ##store-memory } " instruction in the " { $link value-numbering } " pass." } ;
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HELP: foldable-insn
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{ $class-description
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"Instructions which are referentially transparent; used for value numbering." } ;
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HELP: gc-map-insn
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{ $class-description "Union class of all instructions that contain subroutine calls to functions which allocate memory. Each of the instances has a " { $snippet "gc-map" } " slot." } ;
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@ -220,6 +253,8 @@ HELP: gc-map
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ARTICLE: "compiler.cfg.instructions" "Basic block instructions"
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"The " { $vocab-link "compiler.cfg.instructions" } " vocab contains all instruction classes used for generating CFG:s (Call Flow Graphs)."
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$nl
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"All instructions are tuples prefixed with '##' and inheriting from the base class " { $link insn } ". Most instructions are coupled with a generic word in " { $vocab-link "cpu.architecture" } " which emits machine code for it. For example, " { $link %copy } " emits code for " { $link ##copy } " instructions."
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$nl
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"Instruction classes for moving values around:"
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{ $subsections
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##copy
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@ -294,6 +329,8 @@ $nl
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##add-imm
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##and
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##and-imm
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##fixnum-add
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##fixnum-sub
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##mul
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##mul-imm
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##neg
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@ -323,10 +360,15 @@ $nl
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{ $subsections
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##add-vector
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##add-sub-vector
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##compare-float-ordered-branch
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##div-vector
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##horizontal-add-vector
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##horizontal-sub-vector
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##mul-vector
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##single>double-float
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##store-memory-imm
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##sub-vector
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##vector>scalar
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}
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"Stack height manipulation:"
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{ $subsections
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@ -95,3 +95,7 @@ HELP: init-fixup
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HELP: check-fixup
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{ $values { "seq" "a " { $link sequence } " of generated machine code." } }
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{ $description "Used by " { $link with-fixup } " to ensure that the generated machine code is properly aligned." } ;
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ARTICLE: "compiler.codegen" "Code generation from MR (machine representation)" "Code generators for cfg instructions." ;
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ABOUT: "compiler.codegen"
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@ -1,6 +1,6 @@
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USING: assocs alien classes compiler.cfg.instructions compiler.cfg.stack-frame
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cpu.x86.assembler cpu.x86.assembler.operands help.markup help.syntax kernel
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layouts literals math multiline system words ;
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USING: assocs alien classes compiler.cfg.instructions compiler.cfg.registers
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compiler.cfg.stack-frame cpu.x86.assembler cpu.x86.assembler.operands
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help.markup help.syntax kernel layouts literals math multiline system words ;
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QUALIFIED: vm
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IN: cpu.architecture
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@ -73,6 +73,9 @@ init-relocation [ RAX RBX 3 -14 RCX RDX %write-barrier ] B{ } make disassemble
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;
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>>
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HELP: double-2-rep
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{ $var-description "Representation for a pair of doubles." } ;
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HELP: signed-rep
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{ $values { "rep" representation } { "rep'" representation } }
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{ $description "Maps any representation to its signed counterpart, if it has one." } ;
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@ -147,11 +150,45 @@ HELP: %copy
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{ $description "Emits code copying a value from a register, arbitrary memory location or " { $link spill-slot } " to a destination." }
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{ $examples { $unchecked-example $[ ex-%copy ] } } ;
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HELP: %horizontal-add-vector
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{ $values
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{ "dst" "destination register symbol" }
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{ "src1" "first source register" }
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{ "src2" "second source register" }
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{ "rep" "representation" }
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}
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{ $description "Emits machine code for performing a horizontal add, meaning that adjacent elements in the same operand are added together. So if the two vectors are (a0, a1, a2, a3) and (b0, b1, b2, b3) then the result is (a0 + a1, a2 + a3, b0 + b1, b2 + b3)." }
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{ $examples
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{ $unchecked-example
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"USING: cpu.architecture make tools.disassembler ;"
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"[ XMM0 XMM1 XMM2 float-4-rep %horizontal-add-vector ] B{ } make disassemble"
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"0000000002660870: 0f28c1 movaps xmm0, xmm1"
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"0000000002660873: f20f7cc2 haddps xmm0, xmm2"
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}
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} ;
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HELP: %load-immediate
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{ $values { "reg" "a register symbol" } { "val" "a value" } }
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{ $description "Emits code for loading an immediate value into a register. On " { $link x86 } ", if val is 0, then an " { $link XOR } " instruction is emitted instead of " { $link MOV } " because the former is shorter." }
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{ $see-also ##load-tagged } ;
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HELP: %load-memory-imm
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{ $values
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{ "dst" "destination register" }
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{ "base" "base gpr for memory address" }
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{ "offset" "memory offset" }
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{ "rep" "representation" }
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{ "c-type" "no idea" }
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}
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{ $description "Emits code for loading a value from memory into a SIMD register." }
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{ $examples
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{ $unchecked-example
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"USING: cpu.architecture make tools.disassembler ;"
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"[ XMM0 RCX 7 float-4-rep f %load-memory-imm ] B{ } make disassemble"
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"0000000002633800: 480f284107 movaps xmm0, [rcx+0x7]"
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}
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} ;
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HELP: %local-allot
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{ $values
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{ "dst" "destination register symbol" }
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@ -161,6 +198,20 @@ HELP: %local-allot
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}
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{ $description "Emits machine code for stack \"allocating\" a chunk of memory. No memory is really allocated and instead a pointer to it is just put in the destination register." } ;
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HELP: %replace-imm
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{ $values
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{ "src" integer }
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{ "loc" loc }
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}
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{ $description "Emits machine code for putting an integer on the stack." }
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{ $examples
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{ $unchecked-example
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"USING: cpu.architecture make ;"
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"[ 777 D 0 %replace-imm ] B{ } make disassemble"
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"0000000000aad8c0: 49c70690300000 mov qword [r14], 0x3090"
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}
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} ;
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HELP: %safepoint
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{ $description "Emits a safe point to the current code sequence being generated." }
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{ $examples { $unchecked-example $[ ex-%safepoint ] } } ;
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@ -170,6 +221,31 @@ HELP: %save-context
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{ $description "Emits machine code for saving pointers to the callstack, datastack and retainstack in the current context field struct." }
|
||||
{ $examples { $unchecked-example $[ ex-%save-context ] } } ;
|
||||
|
||||
HELP: %store-memory-imm
|
||||
{ $values
|
||||
{ "value" "source register" }
|
||||
{ "base" "base register for memory" }
|
||||
{ "offset" "memory offset" }
|
||||
{ "rep" "representation" }
|
||||
{ "c-type" "a c type or " { $link f } }
|
||||
}
|
||||
{ $description "Emits machine code for " { $link ##store-memory-imm } " instructions." }
|
||||
{ $examples
|
||||
{ $unchecked-example
|
||||
"USING: cpu.architecture prettyprint ;"
|
||||
"[ XMM0 RBX 5 double-rep f %store-memory-imm ] B{ } make disassemble"
|
||||
"0000000002800ae0: f2480f114305 movsd [rbx+0x5], xmm0"
|
||||
}
|
||||
} ;
|
||||
|
||||
HELP: %vector>scalar
|
||||
{ $values
|
||||
{ "dst" "destination register" }
|
||||
{ "src" "source register" }
|
||||
{ "rep" representation }
|
||||
}
|
||||
{ $description "Converts the contents of a SIMD register to a scalar. On x86 this instruction is a noop." } ;
|
||||
|
||||
HELP: %write-barrier
|
||||
{ $values
|
||||
{ "src" "a register symbol" }
|
||||
|
|
@ -222,8 +298,6 @@ HELP: gc-root-offset
|
|||
ARTICLE: "cpu.architecture" "CPU architecture description model"
|
||||
"The " { $vocab-link "cpu.architecture" } " vocab contains generic words and hooks that serves as an api for the compiler towards the cpu architecture."
|
||||
$nl
|
||||
"Register categories:"
|
||||
{ $subsections machine-registers param-regs return-regs }
|
||||
"Architecture support checks:"
|
||||
{ $subsections
|
||||
complex-addressing?
|
||||
|
|
@ -234,8 +308,10 @@ $nl
|
|||
}
|
||||
"Control flow code emitters:"
|
||||
{ $subsections %call %jump %jump-label %return }
|
||||
"Slot access:"
|
||||
{ $subsections %write-barrier }
|
||||
"Moving values around:"
|
||||
{ $subsections %replace %replace-imm }
|
||||
"Register categories:"
|
||||
{ $subsections machine-registers param-regs return-regs }
|
||||
"Representation metadata:"
|
||||
{ $subsections
|
||||
narrow-vector-rep
|
||||
|
|
@ -245,4 +321,6 @@ $nl
|
|||
scalar-rep-of
|
||||
signed-rep
|
||||
widen-vector-rep
|
||||
} ;
|
||||
}
|
||||
"Slot access:"
|
||||
{ $subsections %write-barrier } ;
|
||||
|
|
|
|||
Loading…
Reference in New Issue