cpu.x86.assembler: add support for absolute addressing on x86-64; [RIP+] now behaves like [] did, and [] now does absolute addressing just like in 32-bit mode
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ce16c4ec2c
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c0af678c5b
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@ -55,13 +55,13 @@ M: x86.64 %vm-field-ptr ( dst offset -- )
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: param@ ( n -- op ) reserved-stack-space + stack@ ;
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M: x86.64 %prologue ( n -- )
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temp-reg -7 [] LEA
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temp-reg -7 [RIP+] LEA
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dup PUSH
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temp-reg PUSH
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stack-reg swap 3 cells - SUB ;
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M: x86.64 %prepare-jump
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pic-tail-reg xt-tail-pic-offset [] LEA ;
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pic-tail-reg xt-tail-pic-offset [RIP+] LEA ;
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: load-cards-offset ( dst -- )
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0 MOV rc-absolute-cell rel-cards-offset ;
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@ -47,7 +47,7 @@ IN: bootstrap.x86
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] jit-prolog jit-define
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[
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temp3 5 [] LEA
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temp3 5 [RIP+] LEA
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0 JMP rc-relative rt-entry-point-pic-tail jit-rel
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] jit-word-jump jit-define
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@ -1,5 +1,5 @@
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USING: cpu.x86.assembler cpu.x86.assembler.operands
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kernel tools.test namespaces make ;
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kernel tools.test namespaces make layouts ;
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IN: cpu.x86.assembler.tests
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[ { HEX: 40 HEX: 8a HEX: 2a } ] [ [ BPL RDX [] MOV ] { } make ] unit-test
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@ -164,5 +164,11 @@ IN: cpu.x86.assembler.tests
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[ { 15 183 195 } ] [ [ EAX BX MOVZX ] { } make ] unit-test
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[ { 100 199 5 0 0 0 0 123 0 0 0 } ] [ [ 0 [] FS 123 MOV ] { } make ] unit-test
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bootstrap-cell 4 = [
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[ { 100 199 5 0 0 0 0 123 0 0 0 } ] [ [ 0 [] FS 123 MOV ] { } make ] unit-test
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] when
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bootstrap-cell 8 = [
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[ { 72 137 13 123 0 0 0 } ] [ [ 123 [RIP+] RCX MOV ] { } make ] unit-test
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[ { 101 72 137 12 37 123 0 0 0 } ] [ [ 123 [] GS RCX MOV ] { } make ] unit-test
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] when
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@ -1,9 +1,9 @@
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! Copyright (C) 2005, 2009 Slava Pestov, Joe Groff.
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! Copyright (C) 2005, 2010 Slava Pestov, Joe Groff.
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! See http://factorcode.org/license.txt for BSD license.
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USING: arrays io.binary kernel combinators kernel.private math
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math.bitwise locals namespaces make sequences words system
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layouts math.order accessors cpu.x86.assembler.operands
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cpu.x86.assembler.operands.private ;
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USING: arrays io.binary kernel combinators
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combinators.short-circuit math math.bitwise locals namespaces
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make sequences words system layouts math.order accessors
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cpu.x86.assembler.operands cpu.x86.assembler.operands.private ;
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QUALIFIED: sequences
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IN: cpu.x86.assembler
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@ -22,7 +22,11 @@ IN: cpu.x86.assembler
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GENERIC: sib-present? ( op -- ? )
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M: indirect sib-present?
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[ base>> { ESP RSP R12 } member? ] [ index>> ] [ scale>> ] tri or or ;
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{
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[ base>> { ESP RSP R12 } member? ]
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[ index>> ]
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[ scale>> ]
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} 1|| ;
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M: register sib-present? drop f ;
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@ -1,13 +1,9 @@
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! Copyright (C) 2008, 2009 Slava Pestov, Joe Groff.
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! Copyright (C) 2008, 2010 Slava Pestov, Joe Groff.
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! See http://factorcode.org/license.txt for BSD license.
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USING: kernel words math accessors sequences namespaces
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assocs layouts cpu.x86.assembler.syntax ;
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IN: cpu.x86.assembler.operands
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! In 32-bit mode, { 1234 } is absolute indirect addressing.
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! In 64-bit mode, { 1234 } is RIP-relative.
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! Beware!
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REGISTERS: 8 AL CL DL BL SPL BPL SIL DIL R8B R9B R10B R11B R12B R13B R14B R15B ;
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ALIAS: AH SPL
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@ -90,7 +86,13 @@ M: object operand-64? drop f ;
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PRIVATE>
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: [] ( reg/displacement -- indirect )
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dup integer? [ [ f f f ] dip ] [ f f f ] if <indirect> ;
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dup integer?
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[ [ f f bootstrap-cell 8 = 0 f ? ] dip <indirect> ]
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[ f f f <indirect> ]
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if ;
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: [RIP+] ( displacement -- indirect )
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[ f f f ] dip <indirect> ;
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: [+] ( reg displacement -- indirect )
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dup integer?
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