diff --git a/basis/compiler/cfg/linear-scan/assignment/assignment.factor b/basis/compiler/cfg/linear-scan/assignment/assignment.factor
index ea918a7424..bf2a56adbd 100644
--- a/basis/compiler/cfg/linear-scan/assignment/assignment.factor
+++ b/basis/compiler/cfg/linear-scan/assignment/assignment.factor
@@ -102,7 +102,9 @@ M: vreg-insn assign-registers-in-insn
     >>regs drop ;
 
 : compute-live-registers ( insn -- regs )
-    active-intervals register-mapping ;
+    [ active-intervals ] [ temp-vregs ] bi
+    '[ vreg>> _ memq? not ] filter
+    register-mapping ;
 
 : compute-live-spill-slots ( -- spill-slots )
     spill-slots get values [ values ] map concat