cpu.x86.64: also must save ctx-reg
parent
331e4264b3
commit
c70a1004f8
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@ -91,11 +91,16 @@ IN: bootstrap.x86
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"end_callback" jit-call
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] \ c-to-factor define-sub-primitive
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! In addition to the C ABI volatile regs, we also whack R12
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! when we save context before calling the signal handler.
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: signal-handler-save-regs ( -- regs ) volatile-regs R12 suffix ;
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:: jit-signal-handler-prolog ( -- frame-size )
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! do we also need to save XMM?
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volatile-regs length bootstrap-cells 16 align stack-frame-size + :> frame-size
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signal-handler-save-regs :> save-regs
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save-regs length bootstrap-cells 16 align stack-frame-size + :> frame-size
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RSP frame-size bootstrap-cell - SUB ! minus a cell for return address
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volatile-regs
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save-regs
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[| r i | RSP i bootstrap-cells [+] r MOV ] each-index
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! Now that the registers are saved, we can make the stack frame
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RAX 0 MOV rc-absolute-cell rel-this
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@ -104,7 +109,7 @@ IN: bootstrap.x86
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frame-size ;
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:: jit-signal-handler-epilog ( frame-size -- )
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volatile-regs
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signal-handler-save-regs
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[| r i | r RSP i bootstrap-cells [+] MOV ] each-index
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RSP frame-size bootstrap-cell - ADD ;
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