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cpu.x86.*.bootstrap: save flags in signal-handlers

db4
Joe Groff 2011-11-04 11:56:01 -07:00
parent a934b7f3e5
commit c736b04ada
2 changed files with 14 additions and 7 deletions
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8
basis/cpu/x86/32/bootstrap.factor
View File

@ -104,7 +104,9 @@ IN: bootstrap.x86
:: jit-signal-handler-prolog ( -- frame-size )
stack-frame-size 8 bootstrap-cells + :> frame-size
ESP frame-size bootstrap-cell - SUB ! minus a cell for return address
! minus a cell each for flags and return address
! use LEA so we don't dirty flags
ESP ESP frame-size 2 bootstrap-cells - neg [+] LEA
ESP [] EAX MOV
ESP 1 bootstrap-cells [+] ECX MOV
ESP 2 bootstrap-cells [+] EDX MOV
@ -112,6 +114,7 @@ IN: bootstrap.x86
ESP 4 bootstrap-cells [+] EBP MOV
ESP 5 bootstrap-cells [+] ESI MOV
ESP 6 bootstrap-cells [+] EDI MOV
PUSHF
ESP frame-size 3 bootstrap-cells - [+] 0 MOV rc-absolute-cell rel-this
ESP frame-size 2 bootstrap-cells - [+] frame-size MOV
! subprimitive definition assumes vm's been loaded
@ -119,6 +122,7 @@ IN: bootstrap.x86
frame-size ;
:: jit-signal-handler-epilog ( frame-size -- )
POPF
EAX ESP [] MOV
ECX ESP 1 bootstrap-cells [+] MOV
EDX ESP 2 bootstrap-cells [+] MOV
@ -126,7 +130,7 @@ IN: bootstrap.x86
EBP ESP 4 bootstrap-cells [+] MOV
ESI ESP 5 bootstrap-cells [+] MOV
EDI ESP 6 bootstrap-cells [+] MOV
ESP frame-size bootstrap-cell - ADD ;
ESP ESP frame-size 2 bootstrap-cells - [+] LEA ;
[
EAX ds-reg [] MOV

13
basis/cpu/x86/64/bootstrap.factor
View File

@ -96,10 +96,12 @@ IN: bootstrap.x86
:: jit-signal-handler-prolog ( -- frame-size )
signal-handler-save-regs :> save-regs
save-regs length bootstrap-cells 16 align stack-frame-size + :> frame-size
RSP frame-size bootstrap-cell - SUB ! minus a cell for return address
save-regs
[| r i | RSP i bootstrap-cells [+] r MOV ] each-index
save-regs length 1 + bootstrap-cells 16 align stack-frame-size + :> frame-size
! minus a cell each for flags, return address
! use LEA so we don't dirty flags
RSP RSP frame-size 2 bootstrap-cells - neg [+] LEA
save-regs [| r i | RSP i bootstrap-cells [+] r MOV ] each-index
PUSHF
! Now that the registers are saved, we can make the stack frame
RAX 0 MOV rc-absolute-cell rel-this
RSP frame-size 3 bootstrap-cells - [+] RAX MOV
@ -107,9 +109,10 @@ IN: bootstrap.x86
frame-size ;
:: jit-signal-handler-epilog ( frame-size -- )
POPF
signal-handler-save-regs
[| r i | r RSP i bootstrap-cells [+] MOV ] each-index
RSP frame-size bootstrap-cell - ADD ;
RSP RSP frame-size 2 bootstrap-cells - [+] LEA ;
[
arg1 ds-reg [] MOV