From ca54e6b32bf2f4e72eedcefbf3821b14145d03ab Mon Sep 17 00:00:00 2001
From: slava <slava@factorcode.org>
Date: Fri, 7 Jul 2006 04:18:40 +0000
Subject: [PATCH] Missing file

---
 vm/cpu-ppc.S | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 vm/cpu-ppc.S

diff --git a/vm/cpu-ppc.S b/vm/cpu-ppc.S
new file mode 100644
index 0000000000..254426ea48
--- /dev/null
+++ b/vm/cpu-ppc.S
@@ -0,0 +1,34 @@
+/* Thanks to Joshua Grams for this code.
+
+On PowerPC processors, we must flush the instruction cache manually
+after writing to the code heap.
+
+Callable from C as
+void flush_icache(void *start, int len)
+
+This function is called from compiler.c. */
+
+#ifdef __APPLE__
+	#define MANGLE(sym) _##sym
+#else
+	#define MANGLE(sym) sym
+#endif
+
+	.globl MANGLE(flush_icache)
+MANGLE(flush_icache):
+	/* compute number of cache lines to flush */
+	add r4,r4,r3
+	clrrwi r3,r3,5    /* align addr to next lower cache line boundary */
+	sub r4,r4,r3      /* then n_lines = (len + 0x1f) / 0x20 */
+	addi r4,r4,0x1f
+	srwi. r4,r4,5     /* note '.' suffix */
+	beqlr             /* if n_lines == 0, just return. */
+	mtctr r4          /* flush cache lines */
+0:	dcbf 0,r3         /* for each line... */
+	sync
+	icbi 0,r3
+	addi r3,r3,0x20
+	bdnz 0b
+	sync              /* finish up */
+	isync
+	blr