compiler.cfg.linear-scan: two live intervals which are coalesced will use the same spill slot

basis/compiler/cfg/linear-scan/allocation/spilling/spilling.factor

@@ -38,10 +38,10 @@ ERROR: bad-live-ranges interval ;
     } 2cleave ;
 
 : assign-spill ( live-interval -- )
-    dup vreg>> assign-spill-slot >>spill-to f >>split-next drop ;
+    dup assign-spill-slot >>spill-to f >>split-next drop ;
 
 : assign-reload ( live-interval -- )
-    dup vreg>> assign-spill-slot >>reload-from drop ;
+    dup assign-spill-slot >>reload-from drop ;
 
 : split-and-spill ( live-interval n -- before after )
     split-for-spill 2dup [ assign-spill ] [ assign-reload ] bi* ;

basis/compiler/cfg/linear-scan/allocation/state/state.factor

@@ -126,8 +126,18 @@ SYMBOL: spill-counts
 ! Mapping from vregs to spill slots
 SYMBOL: spill-slots
 
-: assign-spill-slot ( vreg -- n )
-    spill-slots get [ reg-class>> next-spill-slot ] cache ;
+DEFER: assign-spill-slot
+
+: compute-spill-slot ( live-interval -- n )
+    dup copy-from>>
+    [ assign-spill-slot ]
+    [ vreg>> reg-class>> next-spill-slot ] ?if ;
+
+: assign-spill-slot ( live-interval -- n )
+    dup vreg>> spill-slots get at [ ] [
+        [ compute-spill-slot dup ] keep
+        vreg>> spill-slots get set-at
+    ] ?if ;
 
 : init-allocator ( registers -- )
     registers set

basis/compiler/cfg/linear-scan/assignment/assignment.factor

@@ -107,7 +107,7 @@ SYMBOL: check-assignment?
 ERROR: overlapping-registers intervals ;
 
 : check-assignment ( intervals -- )
-    dup [ copy-from>> ] map sift '[ vreg>> _ member? not ] filter
+    dup [ copy-from>> ] map sift [ vreg>> ] map '[ vreg>> _ member? not ] filter
     dup [ reg>> ] map all-unique? [ drop ] [ overlapping-registers ] if ;
 
 : active-intervals ( n -- intervals )