From d3c91bea722bfbdda76c694470684e8457064813 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bj=C3=B6rn=20Lindqvist?= <bjourne@gmail.com>
Date: Sun, 16 Nov 2014 12:12:14 +0100
Subject: [PATCH] compiler.cfg.linear-scan.*: stub docs and tests

---
 .../cfg/linear-scan/allocation/state/state.factor      |  1 -
 .../cfg/linear-scan/assignment/assignment-docs.factor  |  9 +++++++--
 .../cfg/linear-scan/assignment/assignment-tests.factor | 10 ++++++++++
 .../cfg/linear-scan/assignment/assignment.factor       |  2 --
 4 files changed, 17 insertions(+), 5 deletions(-)
 create mode 100644 basis/compiler/cfg/linear-scan/assignment/assignment-tests.factor

diff --git a/basis/compiler/cfg/linear-scan/allocation/state/state.factor b/basis/compiler/cfg/linear-scan/allocation/state/state.factor
index 476e0d307f..5415409ba3 100644
--- a/basis/compiler/cfg/linear-scan/allocation/state/state.factor
+++ b/basis/compiler/cfg/linear-scan/allocation/state/state.factor
@@ -130,7 +130,6 @@ SYMBOL: unhandled-intervals
 ! Minheap of sync points which still need to be processed
 SYMBOL: unhandled-sync-points
 
-! Mapping from vregs to spill slots
 SYMBOL: spill-slots
 
 : assign-spill-slot ( coalesced-vreg rep -- spill-slot )
diff --git a/basis/compiler/cfg/linear-scan/assignment/assignment-docs.factor b/basis/compiler/cfg/linear-scan/assignment/assignment-docs.factor
index b44dbe393e..8b758b56ef 100644
--- a/basis/compiler/cfg/linear-scan/assignment/assignment-docs.factor
+++ b/basis/compiler/cfg/linear-scan/assignment/assignment-docs.factor
@@ -7,8 +7,13 @@ HELP: assign-registers-in-insn
 
 HELP: assign-gc-roots
 { $values { "gc-map" gc-map } }
-{ $description "Assigns spill slots for all gc roots in a gc map." }
-{ $see-also spill-slot } ;
+{ $description "Assigns spill slots for all gc roots in a gc map." } ;
+
+HELP: assign-derived-roots
+{ $values { "gc-map" gc-map } }
+{ $description "Assigns pairs of spill slots for all derived roots in a gc map." } ;
+
+{ assign-gc-roots assign-derived-roots } related-words
 
 HELP: vreg>reg
 { $values { "vreg" "virtaul register" } { "reg" "register" } }
diff --git a/basis/compiler/cfg/linear-scan/assignment/assignment-tests.factor b/basis/compiler/cfg/linear-scan/assignment/assignment-tests.factor
new file mode 100644
index 0000000000..22d2775cee
--- /dev/null
+++ b/basis/compiler/cfg/linear-scan/assignment/assignment-tests.factor
@@ -0,0 +1,10 @@
+USING: compiler.cfg.instructions compiler.cfg.linear-scan.assignment
+compiler.cfg.linear-scan.live-intervals cpu.x86.assembler.operands make
+tools.test ;
+IN: compiler.cfg.linear-scan.assignment.tests
+
+{ { T{ ##spill { src RAX } } } } [
+    [
+        T{ live-interval-state { vreg 1234 } { reg RAX } } insert-spill
+    ] { } make
+] unit-test
diff --git a/basis/compiler/cfg/linear-scan/assignment/assignment.factor b/basis/compiler/cfg/linear-scan/assignment/assignment.factor
index 85eaf37f95..43feb6c3a3 100644
--- a/basis/compiler/cfg/linear-scan/assignment/assignment.factor
+++ b/basis/compiler/cfg/linear-scan/assignment/assignment.factor
@@ -31,8 +31,6 @@ SYMBOL: pending-interval-assoc
     vreg>> pending-interval-assoc get delete-at ;
 
 :: vreg>reg ( vreg -- reg )
-    ! If a live vreg is not in the pending set, then it must
-    ! have been spilled.
     vreg leader :> leader
     leader pending-interval-assoc get at* [
         drop leader vreg rep-of lookup-spill-slot