compiler.cfg.linear-scan.resolve: fix incorrect behavior when one physical register is used with several representations in the same register class
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			@ -7,7 +7,10 @@ IN: compiler.cfg.linear-scan.resolve.tests
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[
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    {
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        { { T{ spill-slot f 0 } int-rep } { 1 int-rep } }
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        {
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            T{ location f T{ spill-slot f 0 } int-rep int-regs }
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            T{ location f 1 int-rep int-regs }
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        }
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    }
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] [
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    [
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			@ -21,7 +24,9 @@ IN: compiler.cfg.linear-scan.resolve.tests
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    }
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] [
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    [
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        { T{ spill-slot f 0 } int-rep } { 1 int-rep } >insn
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        T{ location f T{ spill-slot f 0 } int-rep int-regs }
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        T{ location f 1 int-rep int-regs }
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        >insn
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    ] { } make
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] unit-test
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			@ -31,7 +36,9 @@ IN: compiler.cfg.linear-scan.resolve.tests
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    }
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] [
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    [
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        { 1 int-rep } { T{ spill-slot f 0 } int-rep } >insn
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        T{ location f 1 int-rep int-regs }
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        T{ location f T{ spill-slot f 0 } int-rep int-regs }
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        >insn
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    ] { } make
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] unit-test
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			@ -41,17 +48,68 @@ IN: compiler.cfg.linear-scan.resolve.tests
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    }
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] [
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    [
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        { 1 int-rep } { 2 int-rep } >insn
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        T{ location f 1 int-rep int-regs }
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        T{ location f 2 int-rep int-regs }
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        >insn
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    ] { } make
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] unit-test
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[
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    {
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        T{ ##copy { src 1 } { dst 2 } { rep int-rep } }
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    }
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] [
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    { { T{ location f 1 int-rep int-regs } T{ location f 2 int-rep int-regs } } }
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    mapping-instructions
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] unit-test
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[
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    {
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        T{ _spill { src 0 } { rep int-rep } { dst T{ spill-slot f 0 } } }
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        T{ _reload { dst 0 } { rep tagged-rep } { src T{ spill-slot f 1 } } }
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    }
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] [
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    {
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        { T{ location f T{ spill-slot f 1 } tagged-rep int-regs } T{ location f 0 tagged-rep int-regs } }
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        { T{ location f 0 int-rep int-regs } T{ location f T{ spill-slot f 0 } int-rep int-regs } }
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    }
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    mapping-instructions
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] unit-test
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[
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    {
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        T{ _spill { src 0 } { rep int-rep } { dst T{ spill-slot f 1 } } }
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        T{ _reload { dst 0 } { rep tagged-rep } { src T{ spill-slot f 0 } } }
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    }
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] [
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    {
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        { T{ location f T{ spill-slot f 0 } tagged-rep int-regs } T{ location f 0 tagged-rep int-regs } }
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        { T{ location f 0 int-rep int-regs } T{ location f T{ spill-slot f 1 } int-rep int-regs } }
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    }
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    mapping-instructions
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] unit-test
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[
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    {
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        T{ _spill { src 0 } { rep int-rep } { dst T{ spill-slot f 1 } } }
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        T{ _reload { dst 0 } { rep tagged-rep } { src T{ spill-slot f 0 } } }
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    }
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] [
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    {
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        { T{ location f 0 int-rep int-regs } T{ location f T{ spill-slot f 1 } int-rep int-regs } }
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        { T{ location f T{ spill-slot f 0 } tagged-rep int-regs } T{ location f 0 tagged-rep int-regs } }
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    }
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    mapping-instructions
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] unit-test
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cfg new 8 >>spill-area-size cfg set
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H{ } clone spill-temps set
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[
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    t
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] [
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    { { { 0 int-rep } { 1 int-rep } } { { 1 int-rep } { 0 int-rep } } }
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[ t ] [
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    {
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        { T{ location f 0 int-rep int-regs } T{ location f 1 int-rep int-regs } }
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        { T{ location f 1 int-rep int-regs } T{ location f 0 int-rep int-regs } }
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    }
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    mapping-instructions {
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        {
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            T{ _spill { src 0 } { rep int-rep } { dst T{ spill-slot f 8 } } }
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			@ -1,8 +1,9 @@
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! Copyright (C) 2009 Slava Pestov.
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! Copyright (C) 2009, 2010 Slava Pestov.
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! See http://factorcode.org/license.txt for BSD license.
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USING: accessors arrays assocs combinators
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combinators.short-circuit fry kernel locals namespaces
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make math sequences hashtables
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cpu.architecture
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compiler.cfg
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compiler.cfg.rpo
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compiler.cfg.liveness
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			@ -15,13 +16,29 @@ compiler.cfg.linear-scan.assignment
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compiler.cfg.linear-scan.allocation.state ;
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IN: compiler.cfg.linear-scan.resolve
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TUPLE: location
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{ reg read-only }
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{ rep read-only }
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{ reg-class read-only } ;
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: <location> ( reg rep -- location )
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    dup reg-class-of location boa ;
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M: location equal?
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    over location? [
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        { [ [ reg>> ] bi@ = ] [ [ reg-class>> ] bi@ = ] } 2&&
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    ] [ 2drop f ] if ;
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M: location hashcode*
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    reg>> hashcode* ;
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SYMBOL: spill-temps
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: spill-temp ( rep -- n )
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    spill-temps get [ next-spill-slot ] cache ;
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: add-mapping ( from to rep -- )
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    '[ _ 2array ] bi@ 2array , ;
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    '[ _ <location> ] bi@ 2array , ;
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:: resolve-value-data-flow ( bb to vreg -- )
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    vreg bb vreg-at-end
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			@ -34,19 +51,19 @@ SYMBOL: spill-temps
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    ] if ;
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: memory->register ( from to -- )
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    swap [ first2 ] [ first ] bi* _reload ;
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    swap [ reg>> ] [ [ rep>> ] [ reg>> ] bi ] bi* _reload ;
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: register->memory ( from to -- )
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    [ first2 ] [ first ] bi* _spill ;
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    [ [ reg>> ] [ rep>> ] bi ] [ reg>> ] bi* _spill ;
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: temp->register ( from to -- )
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    nip [ first ] [ second ] [ second spill-temp ] tri _reload ;
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    nip [ reg>> ] [ rep>> ] [ rep>> spill-temp ] tri _reload ;
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: register->temp ( from to -- )
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    drop [ first2 ] [ second spill-temp ] bi _spill ;
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    drop [ [ reg>> ] [ rep>> ] bi ] [ rep>> spill-temp ] bi _spill ;
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: register->register ( from to -- )
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    swap [ first ] [ first2 ] bi* ##copy ;
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    swap [ reg>> ] [ [ reg>> ] [ rep>> ] bi ] bi* ##copy ;
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SYMBOL: temp
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			@ -54,8 +71,8 @@ SYMBOL: temp
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    {
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        { [ over temp eq? ] [ temp->register ] }
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        { [ dup temp eq? ] [ register->temp ] }
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        { [ over first spill-slot? ] [ memory->register ] }
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        { [ dup first spill-slot? ] [ register->memory ] }
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        { [ over reg>> spill-slot? ] [ memory->register ] }
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        { [ dup reg>> spill-slot? ] [ register->memory ] }
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        [ register->register ]
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    } cond ;
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