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Updating x86.64 port

db4
Slava Pestov 2008-01-12 21:38:57 -05:00
parent 2fd1899d84
commit ede5bb9243
5 changed files with 37 additions and 17 deletions
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1
core/cpu/x86/32/bootstrap.factor
View File

@ -12,5 +12,6 @@ IN: bootstrap.x86
: stack-reg ESP ;
: ds-reg ESI ;
: fixnum>slot@ arg0 1 SAR ;
: rex-length 0 ;
"resource:core/cpu/x86/bootstrap.factor" run-file

1
core/cpu/x86/64/bootstrap.factor
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@ -12,5 +12,6 @@ IN: bootstrap.x86
: stack-reg RSP ;
: ds-reg R14 ;
: fixnum>slot@ ;
: rex-length 1 ;
"resource:core/cpu/x86/bootstrap.factor" run-file

2
core/cpu/x86/assembler/assembler.factor
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@ -81,7 +81,7 @@ SYMBOL: XMM15 \ XMM15 15 128 define-register
: n, >le % ; inline
: 4, 4 n, ; inline
: 2, 2 n, ; inline
: cell, cell n, ; inline
: cell, bootstrap-cell n, ; inline
#! Extended AMD64 registers (R8-R15) return true.
GENERIC: extended? ( op -- ? )

18
core/cpu/x86/bootstrap.factor
View File

@ -23,25 +23,27 @@ big-endian off
temp-reg compiled-header-size ADD
! Jump to XT
temp-reg JMP
] rc-absolute-cell rt-literal 1 jit-profiling jit-define
] rc-absolute-cell rt-literal 1 rex-length + jit-profiling jit-define
[
temp-reg 0 MOV ! load XT
stack-frame-size PUSH ! save stack frame size
0 PUSH ! push XT
temp-reg PUSH ! push XT
arg1 PUSH ! alignment
] rc-absolute-cell rt-label 6 jit-prolog jit-define
] rc-absolute-cell rt-label 1 rex-length + jit-prolog jit-define
[
arg0 0 MOV ! load literal
arg0 dup [] MOV
ds-reg bootstrap-cell ADD ! increment datastack pointer
ds-reg [] arg0 MOV ! store literal on datastack
] rc-absolute-cell rt-literal 1 jit-push-literal jit-define
] rc-absolute-cell rt-literal 1 rex-length + jit-push-literal jit-define
[
arg0 0 MOV ! load XT
arg1 stack-reg MOV ! pass callstack pointer as arg 2
(JMP) drop ! go
] rc-relative rt-primitive 3 jit-primitive jit-define
arg0 JMP ! go
] rc-absolute-cell rt-primitive 1 rex-length + jit-primitive jit-define
[
(JMP) drop
@ -59,7 +61,7 @@ big-endian off
arg0 arg1 [] CMOVNE ! load true branch if not equal
arg0 arg1 bootstrap-cell [+] CMOVE ! load false branch if equal
arg0 quot-xt@ [+] JMP ! jump to quotation-xt
] rc-absolute-cell rt-literal 1 jit-if-jump jit-define
] rc-absolute-cell rt-literal 1 rex-length + jit-if-jump jit-define
[
arg1 0 MOV ! load dispatch table
@ -70,7 +72,7 @@ big-endian off
arg0 arg1 ADD ! compute quotation location
arg0 arg0 array-start [+] MOV ! load quotation
arg0 quot-xt@ [+] JMP ! execute branch
] rc-absolute-cell rt-literal 1 jit-dispatch jit-define
] rc-absolute-cell rt-literal 1 rex-length + jit-dispatch jit-define
[
stack-reg stack-frame-size bootstrap-cell - ADD ! unwind stack frame

32
core/cpu/x86/intrinsics/intrinsics.factor
View File

@ -240,14 +240,30 @@ IN: cpu.x86.intrinsics
}
} define-intrinsics
\ fixnum-shift [
"x" operand "y" get neg SAR
! Mask off low bits
"x" operand %untag
] H{
{ +input+ { { f "x" } { [ -31 0 between? ] "y" } } }
{ +output+ { "x" } }
} define-intrinsic
\ fixnum-shift-fast {
{
[
"y" operand NEG
"y" operand %untag-fixnum
"x" operand "y" operand SAR
! Mask off low bits
"x" operand %untag
] H{
{ +input+ { { f "x" } { f "y" } } }
{ +output+ { "x" } }
{ +clobber+ { "y" } }
}
} {
[
"x" operand "y" get neg SAR
! Mask off low bits
"x" operand %untag
] H{
{ +input+ { { f "x" } { [ ] "y" } } }
{ +output+ { "x" } }
}
}
} define-intrinsics
: %untag-fixnums ( seq -- )
[ %untag-fixnum ] unique-operands ;