cpu.x86.64: eliminate useless instruction from primitive call sequence for a marginal to non-existent gain
parent
0569f08ea2
commit
ef53e6ecd5
|
@ -63,12 +63,13 @@ IN: bootstrap.x86
|
|||
rs-reg ctx-reg context-retainstack-offset [+] MOV ;
|
||||
|
||||
[
|
||||
! ctx-reg is preserved across the call because it is non-volatile
|
||||
! in the C ABI
|
||||
jit-load-vm
|
||||
jit-save-context
|
||||
! call the primitive
|
||||
ESP [] vm-reg MOV
|
||||
0 CALL rc-relative rt-dlsym jit-rel
|
||||
! restore ds, rs registers
|
||||
jit-restore-context
|
||||
] jit-primitive jit-define
|
||||
|
||||
|
|
|
@ -57,11 +57,12 @@ IN: bootstrap.x86
|
|||
ctx-reg context-retainstack-offset [+] rs-reg MOV ;
|
||||
|
||||
: jit-restore-context ( -- )
|
||||
jit-load-context
|
||||
ds-reg ctx-reg context-datastack-offset [+] MOV
|
||||
rs-reg ctx-reg context-retainstack-offset [+] MOV ;
|
||||
|
||||
[
|
||||
! ctx-reg is preserved across the call because it is non-volatile
|
||||
! in the C ABI
|
||||
jit-save-context
|
||||
! call the primitive
|
||||
arg1 vm-reg MOV
|
||||
|
@ -80,6 +81,7 @@ IN: bootstrap.x86
|
|||
arg1 vm-reg MOV
|
||||
"begin_callback" jit-call
|
||||
|
||||
jit-load-context
|
||||
jit-restore-context
|
||||
|
||||
! call the quotation
|
||||
|
@ -115,6 +117,7 @@ IN: bootstrap.x86
|
|||
vm-reg 0 MOV 0 rc-absolute-cell jit-vm
|
||||
|
||||
! Load ds and rs registers
|
||||
jit-load-context
|
||||
jit-restore-context
|
||||
|
||||
! Call quotation
|
||||
|
@ -168,6 +171,7 @@ IN: bootstrap.x86
|
|||
arg1 RBX MOV
|
||||
arg2 vm-reg MOV
|
||||
"inline_cache_miss" jit-call
|
||||
jit-load-context
|
||||
jit-restore-context ;
|
||||
|
||||
[ jit-load-return-address jit-inline-cache-miss ]
|
||||
|
|
Loading…
Reference in New Issue