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spill to spill-temp, not to virtual spill addresses

db4
Doug Coleman 2009-06-30 15:40:13 -05:00
parent ede8e1ca30
commit f41f84436c
2 changed files with 20 additions and 26 deletions
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26
basis/compiler/cfg/linear-scan/resolve/resolve-tests.factor
View File

@ -68,12 +68,12 @@ T{ live-interval
[
{
T{ _copy { dst 5 } { src 4 } { class int-regs } }
T{ _spill { src 0 } { class int-regs } { n 6 } }
T{ _spill { src 0 } { class int-regs } { n spill-temp } }
T{ _copy { dst 0 } { src 1 } { class int-regs } }
T{ _reload { dst 1 } { class int-regs } { n 6 } }
T{ _spill { src 0 } { class float-regs } { n 7 } }
T{ _reload { dst 1 } { class int-regs } { n spill-temp } }
T{ _spill { src 0 } { class float-regs } { n spill-temp } }
T{ _copy { dst 0 } { src 1 } { class float-regs } }
T{ _reload { dst 1 } { class float-regs } { n 7 } }
T{ _reload { dst 1 } { class float-regs } { n spill-temp } }
}
] [
{
@ -87,10 +87,10 @@ T{ live-interval
[
{
T{ _spill { src 0 } { class int-regs } { n 3 } }
T{ _spill { src 0 } { class int-regs } { n spill-temp } }
T{ _copy { dst 0 } { src 2 } { class int-regs } }
T{ _copy { dst 2 } { src 1 } { class int-regs } }
T{ _reload { dst 1 } { class int-regs } { n 3 } }
T{ _reload { dst 1 } { class int-regs } { n spill-temp } }
}
] [
{
@ -102,10 +102,10 @@ T{ live-interval
[
{
T{ _spill { src 0 } { class int-regs } { n 3 } }
T{ _spill { src 0 } { class int-regs } { n spill-temp } }
T{ _copy { dst 0 } { src 2 } { class int-regs } }
T{ _copy { dst 2 } { src 1 } { class int-regs } }
T{ _reload { dst 1 } { class int-regs } { n 3 } }
T{ _reload { dst 1 } { class int-regs } { n spill-temp } }
}
] [
{
@ -136,7 +136,7 @@ T{ live-interval
] unit-test
[
{ T{ _spill { src 4 } { class int-regs } { n 4 } } }
{ T{ _spill { src 4 } { class int-regs } { n spill-temp } } }
] [
{
T{ register->memory { from 4 } { to 4 } { reg-class int-regs } }
@ -162,10 +162,10 @@ T{ live-interval
{
T{ _copy { dst 1 } { src 0 } { class int-regs } }
T{ _copy { dst 2 } { src 0 } { class int-regs } }
T{ _spill { src 3 } { class int-regs } { n 5 } }
T{ _spill { src 3 } { class int-regs } { n spill-temp } }
T{ _copy { dst 4 } { src 0 } { class int-regs } }
T{ _copy { dst 3 } { src 4 } { class int-regs } }
T{ _reload { dst 0 } { class int-regs } { n 5 } }
T{ _reload { dst 0 } { class int-regs } { n spill-temp } }
}
] [
{
@ -182,10 +182,10 @@ T{ live-interval
T{ _copy { dst 2 } { src 0 } { class int-regs } }
T{ _copy { dst 9 } { src 1 } { class int-regs } }
T{ _copy { dst 1 } { src 0 } { class int-regs } }
T{ _spill { src 3 } { class int-regs } { n 10 } }
T{ _spill { src 3 } { class int-regs } { n spill-temp } }
T{ _copy { dst 4 } { src 0 } { class int-regs } }
T{ _copy { dst 3 } { src 4 } { class int-regs } }
T{ _reload { dst 0 } { class int-regs } { n 10 } }
T{ _reload { dst 0 } { class int-regs } { n spill-temp } }
}
] [
{

20
basis/compiler/cfg/linear-scan/resolve/resolve.factor
View File

@ -68,10 +68,10 @@ M: memory->memory >insn
[ from>> ] [ to>> ] bi = [ "Not allowed" throw ] unless ;
M: register->memory >insn
[ from>> ] [ reg-class>> ] [ to>> ] tri _spill ;
[ from>> ] [ reg-class>> ] bi spill-temp _spill ;
M: memory->register >insn
[ to>> ] [ reg-class>> ] [ from>> ] tri _reload ;
[ to>> ] [ reg-class>> ] bi spill-temp _reload ;
M: register->register >insn
[ to>> ] [ from>> ] [ reg-class>> ] tri _copy ;
@ -82,10 +82,10 @@ M: memory->memory >collision-table
[ from>> ] [ to>> ] bi = [ "Not allowed" throw ] unless ;
M: register->memory >collision-table
[ from>> ] [ reg-class>> ] [ to>> ] tri _spill ;
[ from>> ] [ reg-class>> ] bi spill-temp _spill ;
M: memory->register >collision-table
[ to>> ] [ reg-class>> ] [ from>> ] tri _reload ;
[ to>> ] [ reg-class>> ] bi spill-temp _reload ;
M: register->register >collision-table
[ to>> ] [ from>> ] [ reg-class>> ] tri _copy ;
@ -119,10 +119,6 @@ M: register->register to-loc drop register ;
: independent-assignment? ( operations -- pair )
to-reg froms get key? not ;
: init-temp-spill ( operations -- )
[ [ to>> ] [ from>> ] bi max ] [ max ] map-reduce
1 + temp-spill set ;
: set-tos/froms ( operations -- )
[ [ [ from-reg ] keep ] H{ } map>assoc froms set ]
[ [ [ to-reg ] keep ] H{ } map>assoc tos set ]
@ -146,10 +142,10 @@ M: register->register to-loc drop register ;
: break-cycle-n ( operations -- operations' )
unclip [
[ from>> temp-spill get ]
[ from>> spill-temp ]
[ reg-class>> ] bi \ register->memory boa
] [
[ to>> temp-spill [ get ] [ inc ] bi swap ]
[ to>> spill-temp swap ]
[ reg-class>> ] bi \ memory->register boa
] bi [ 1array ] bi@ surround ;
@ -182,9 +178,7 @@ M: register->register to-loc drop register ;
: mapping-instructions ( mappings -- insns )
[
[ init-temp-spill ]
[ set-tos/froms ]
[ parallel-mappings ] tri
[ set-tos/froms ] [ parallel-mappings ] bi
[ [ >insn ] each ] { } make
] with-scope ;