Merge branch 'master' of git://factorcode.org/git/factor
commit
f800285327
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@ -194,8 +194,8 @@ IN: compiler.cfg.intrinsics
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{ math.vectors.simd.intrinsics:(simd-gather-2) [ emit-gather-vector-2 ] }
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{ math.vectors.simd.intrinsics:(simd-gather-4) [ emit-gather-vector-4 ] }
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{ math.vectors.simd.intrinsics:(simd-vshuffle) [ emit-shuffle-vector ] }
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{ math.vectors.simd.intrinsics:(simd-vmerge-head) [ [ ^^merge-vector-head ] emit-binary-vector-op ] }
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{ math.vectors.simd.intrinsics:(simd-vmerge-tail) [ [ ^^merge-vector-tail ] emit-binary-vector-op ] }
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{ math.vectors.simd.intrinsics:(simd-(vmerge-head)) [ [ ^^merge-vector-head ] emit-binary-vector-op ] }
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{ math.vectors.simd.intrinsics:(simd-(vmerge-tail)) [ [ ^^merge-vector-tail ] emit-binary-vector-op ] }
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{ math.vectors.simd.intrinsics:(simd-select) [ emit-select-vector ] }
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{ math.vectors.simd.intrinsics:(simd-sum) [ [ ^^horizontal-add-vector ] emit-unary-vector-op ] }
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{ math.vectors.simd.intrinsics:alien-vector [ emit-alien-vector ] }
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@ -1465,7 +1465,7 @@ V{
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[ ] [ { 1 2 3 } test-linear-scan-on-cfg ] unit-test
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[ { 1 } ] [ 1 get instructions>> first tagged-values>> ] unit-test
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[ { { 0 1 } } ] [ 1 get instructions>> first tagged-values>> ] unit-test
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V{
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T{ ##peek f 0 D 0 }
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@ -1487,4 +1487,4 @@ V{
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[ ] [ { 1 2 3 } test-linear-scan-on-cfg ] unit-test
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[ { 1 } ] [ 1 get instructions>> first tagged-values>> ] unit-test
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[ { { 0 1 } } ] [ 1 get instructions>> first tagged-values>> ] unit-test
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@ -31,8 +31,8 @@ IN: compiler.tree.propagation.simd
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(simd-hlshift)
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(simd-hrshift)
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(simd-vshuffle)
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(simd-vmerge-head)
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(simd-vmerge-tail)
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(simd-(vmerge-head))
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(simd-(vmerge-tail))
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(simd-v<=)
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(simd-v<)
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(simd-v=)
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@ -424,15 +424,15 @@ INSTANCE: A sequence
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: A-vmerge-head-op ( v1 v2 quot -- v )
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drop
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[ underlying1>> ] bi@
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[ A-rep (simd-vmerge-head) ]
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[ A-rep (simd-vmerge-tail) ] 2bi
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[ A-rep (simd-(vmerge-head)) ]
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[ A-rep (simd-(vmerge-tail)) ] 2bi
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\ A boa ;
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: A-vmerge-tail-op ( v1 v2 quot -- v )
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drop
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[ underlying2>> ] bi@
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[ A-rep (simd-vmerge-head) ]
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[ A-rep (simd-vmerge-tail) ] 2bi
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[ A-rep (simd-(vmerge-head)) ]
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[ A-rep (simd-(vmerge-tail)) ] 2bi
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\ A boa ;
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simd new
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@ -445,8 +445,8 @@ simd new
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{ vnone? A-vany-op }
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{ vany? A-vany-op }
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{ vall? A-vall-op }
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{ vmerge-head A-vmerge-head-op }
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{ vmerge-tail A-vmerge-tail-op }
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{ (vmerge-head) A-vmerge-head-op }
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{ (vmerge-tail) A-vmerge-tail-op }
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} >>special-wrappers
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{
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{ { +vector+ +vector+ -> +vector+ } A-vv->v-op }
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@ -55,8 +55,8 @@ SIMD-OP: vrshift
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SIMD-OP: hlshift
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SIMD-OP: hrshift
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SIMD-OP: vshuffle
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SIMD-OP: vmerge-head
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SIMD-OP: vmerge-tail
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SIMD-OP: (vmerge-head)
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SIMD-OP: (vmerge-tail)
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SIMD-OP: v<=
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SIMD-OP: v<
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SIMD-OP: v=
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@ -120,46 +120,46 @@ GENERIC# supported-simd-op? 1 ( rep intrinsic -- ? )
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M: vector-rep supported-simd-op?
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{
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{ \ (simd-v+) [ %add-vector-reps ] }
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{ \ (simd-vs+) [ %saturated-add-vector-reps ] }
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{ \ (simd-v+-) [ %add-sub-vector-reps ] }
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{ \ (simd-v-) [ %sub-vector-reps ] }
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{ \ (simd-vs-) [ %saturated-sub-vector-reps ] }
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{ \ (simd-v*) [ %mul-vector-reps ] }
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{ \ (simd-vs*) [ %saturated-mul-vector-reps ] }
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{ \ (simd-v/) [ %div-vector-reps ] }
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{ \ (simd-vmin) [ %min-vector-reps ] }
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{ \ (simd-vmax) [ %max-vector-reps ] }
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{ \ (simd-v.) [ %dot-vector-reps ] }
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{ \ (simd-vsqrt) [ %sqrt-vector-reps ] }
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{ \ (simd-sum) [ %horizontal-add-vector-reps ] }
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{ \ (simd-vabs) [ %abs-vector-reps ] }
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{ \ (simd-vbitand) [ %and-vector-reps ] }
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{ \ (simd-vbitandn) [ %andn-vector-reps ] }
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{ \ (simd-vbitor) [ %or-vector-reps ] }
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{ \ (simd-vbitxor) [ %xor-vector-reps ] }
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{ \ (simd-vbitnot) [ %not-vector-reps ] }
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{ \ (simd-vand) [ %and-vector-reps ] }
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{ \ (simd-vandn) [ %andn-vector-reps ] }
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{ \ (simd-vor) [ %or-vector-reps ] }
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{ \ (simd-vxor) [ %xor-vector-reps ] }
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{ \ (simd-vnot) [ %not-vector-reps ] }
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{ \ (simd-vlshift) [ %shl-vector-reps ] }
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{ \ (simd-vrshift) [ %shr-vector-reps ] }
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{ \ (simd-hlshift) [ %horizontal-shl-vector-reps ] }
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{ \ (simd-hrshift) [ %horizontal-shr-vector-reps ] }
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{ \ (simd-vshuffle) [ %shuffle-vector-reps ] }
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{ \ (simd-vmerge-head) [ %merge-vector-reps ] }
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{ \ (simd-vmerge-tail) [ %merge-vector-reps ] }
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{ \ (simd-v<=) [ cc<= %compare-vector-reps ] }
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{ \ (simd-v<) [ cc< %compare-vector-reps ] }
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{ \ (simd-v=) [ cc= %compare-vector-reps ] }
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{ \ (simd-v>) [ cc> %compare-vector-reps ] }
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{ \ (simd-v>=) [ cc>= %compare-vector-reps ] }
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{ \ (simd-vunordered?) [ cc/<>= %compare-vector-reps ] }
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{ \ (simd-gather-2) [ %gather-vector-2-reps ] }
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{ \ (simd-gather-4) [ %gather-vector-4-reps ] }
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{ \ (simd-vany?) [ %test-vector-reps ] }
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{ \ (simd-vall?) [ %test-vector-reps ] }
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{ \ (simd-vnone?) [ %test-vector-reps ] }
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{ \ (simd-v+) [ %add-vector-reps ] }
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{ \ (simd-vs+) [ %saturated-add-vector-reps ] }
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{ \ (simd-v+-) [ %add-sub-vector-reps ] }
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{ \ (simd-v-) [ %sub-vector-reps ] }
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{ \ (simd-vs-) [ %saturated-sub-vector-reps ] }
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{ \ (simd-v*) [ %mul-vector-reps ] }
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{ \ (simd-vs*) [ %saturated-mul-vector-reps ] }
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{ \ (simd-v/) [ %div-vector-reps ] }
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{ \ (simd-vmin) [ %min-vector-reps ] }
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{ \ (simd-vmax) [ %max-vector-reps ] }
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{ \ (simd-v.) [ %dot-vector-reps ] }
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{ \ (simd-vsqrt) [ %sqrt-vector-reps ] }
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{ \ (simd-sum) [ %horizontal-add-vector-reps ] }
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{ \ (simd-vabs) [ %abs-vector-reps ] }
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{ \ (simd-vbitand) [ %and-vector-reps ] }
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{ \ (simd-vbitandn) [ %andn-vector-reps ] }
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{ \ (simd-vbitor) [ %or-vector-reps ] }
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{ \ (simd-vbitxor) [ %xor-vector-reps ] }
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{ \ (simd-vbitnot) [ %not-vector-reps ] }
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{ \ (simd-vand) [ %and-vector-reps ] }
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{ \ (simd-vandn) [ %andn-vector-reps ] }
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{ \ (simd-vor) [ %or-vector-reps ] }
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{ \ (simd-vxor) [ %xor-vector-reps ] }
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{ \ (simd-vnot) [ %not-vector-reps ] }
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{ \ (simd-vlshift) [ %shl-vector-reps ] }
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{ \ (simd-vrshift) [ %shr-vector-reps ] }
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{ \ (simd-hlshift) [ %horizontal-shl-vector-reps ] }
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{ \ (simd-hrshift) [ %horizontal-shr-vector-reps ] }
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{ \ (simd-vshuffle) [ %shuffle-vector-reps ] }
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{ \ (simd-(vmerge-head)) [ %merge-vector-reps ] }
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{ \ (simd-(vmerge-tail)) [ %merge-vector-reps ] }
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{ \ (simd-v<=) [ cc<= %compare-vector-reps ] }
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{ \ (simd-v<) [ cc< %compare-vector-reps ] }
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{ \ (simd-v=) [ cc= %compare-vector-reps ] }
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{ \ (simd-v>) [ cc> %compare-vector-reps ] }
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{ \ (simd-v>=) [ cc>= %compare-vector-reps ] }
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{ \ (simd-vunordered?) [ cc/<>= %compare-vector-reps ] }
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{ \ (simd-gather-2) [ %gather-vector-2-reps ] }
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{ \ (simd-gather-4) [ %gather-vector-4-reps ] }
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{ \ (simd-vany?) [ %test-vector-reps ] }
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{ \ (simd-vall?) [ %test-vector-reps ] }
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{ \ (simd-vnone?) [ %test-vector-reps ] }
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} case member? ;
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@ -98,8 +98,8 @@ H{
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{ hrshift { +vector+ +literal+ -> +vector+ } }
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{ vshuffle { +vector+ +literal+ -> +vector+ } }
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{ vbroadcast { +vector+ +literal+ -> +vector+ } }
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{ vmerge-head { +vector+ +vector+ -> +vector+ } }
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{ vmerge-tail { +vector+ +vector+ -> +vector+ } }
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{ (vmerge-head) { +vector+ +vector+ -> +vector+ } }
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{ (vmerge-tail) { +vector+ +vector+ -> +vector+ } }
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{ v<= { +vector+ +vector+ -> +vector+ } }
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{ v< { +vector+ +vector+ -> +vector+ } }
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{ v= { +vector+ +vector+ -> +vector+ } }
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@ -59,7 +59,8 @@ $nl
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{ $subsection vbroadcast }
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{ $subsection hlshift }
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{ $subsection hrshift }
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{ $subsection vmerge } ;
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{ $subsection vmerge }
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{ $subsection (vmerge) } ;
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ARTICLE: "math-vectors-logic" "Vector component- and bit-wise logic"
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{ $notes
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@ -357,37 +358,50 @@ HELP: hrshift
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{ $description "Shifts the entire SIMD array to the right by " { $snippet "n" } " bytes, filling the vacated left-hand bits with zeroes. This word may only be used in a context where the compiler can statically infer that the input is a SIMD array." } ;
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HELP: vmerge
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{ $values { "u" "a sequence" } { "v" "a sequence" } { "h" "a sequence" } { "t" "a sequence" } }
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{ $description "Creates two new sequences of the same type and size as " { $snippet "u" } " and " { $snippet "v" } " by interleaving the elements of " { $snippet "u" } " and " { $snippet "v" } "." }
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{ $values { "u" "a sequence" } { "v" "a sequence" } { "w" "a sequence" } }
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{ $description "Creates a new sequence of the same type as and twice the length of " { $snippet "u" } " and " { $snippet "v" } " by interleaving the elements of " { $snippet "u" } " and " { $snippet "v" } "." }
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{ $examples
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{ $example """USING: kernel math.vectors prettyprint ;
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{ "A" "B" "C" "D" } { "1" "2" "3" "4" } vmerge [ . ] bi@"""
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{ "A" "B" "C" "D" } { "1" "2" "3" "4" } vmerge ."""
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"""{ "A" "1" "B" "2" "C" "3" "D" "4" }"""
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} } ;
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HELP: (vmerge)
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{ $values { "u" "a sequence" } { "v" "a sequence" } { "h" "a sequence" } { "t" "a sequence" } }
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{ $description "Creates two new sequences of the same type and size as " { $snippet "u" } " and " { $snippet "v" } " by interleaving the elements of " { $snippet "u" } " and " { $snippet "v" } "." }
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{ $notes "For hardware-supported SIMD vector types this word compiles to a single instruction per output value." }
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{ $examples
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{ $example """USING: kernel math.vectors prettyprint ;
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{ "A" "B" "C" "D" } { "1" "2" "3" "4" } (vmerge) [ . ] bi@"""
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"""{ "A" "1" "B" "2" }
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{ "C" "3" "D" "4" }"""
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} } ;
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HELP: vmerge-head
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HELP: (vmerge-head)
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{ $values { "u" "a sequence" } { "v" "a sequence" } { "h" "a sequence" } }
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{ $description "Creates two new sequences of the same type and size as " { $snippet "u" } " and " { $snippet "v" } " by interleaving the elements from the first half of " { $snippet "u" } " and " { $snippet "v" } "." }
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{ $description "Creates a new sequence of the same type and size as " { $snippet "u" } " and " { $snippet "v" } " by interleaving the elements from the first half of " { $snippet "u" } " and " { $snippet "v" } "." }
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{ $notes "For hardware-supported SIMD vector types this word compiles to a single instruction." }
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{ $examples
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{ $example """USING: kernel math.vectors prettyprint ;
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{ "A" "B" "C" "D" } { "1" "2" "3" "4" } vmerge-head ."""
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{ "A" "B" "C" "D" } { "1" "2" "3" "4" } (vmerge-head) ."""
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"""{ "A" "1" "B" "2" }"""
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} } ;
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HELP: vmerge-tail
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HELP: (vmerge-tail)
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{ $values { "u" "a sequence" } { "v" "a sequence" } { "t" "a sequence" } }
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{ $description "Creates two new sequences of the same type and size as " { $snippet "u" } " and " { $snippet "v" } " by interleaving the elements from the tail half of " { $snippet "u" } " and " { $snippet "v" } "." }
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{ $description "Creates a new sequence of the same type and size as " { $snippet "u" } " and " { $snippet "v" } " by interleaving the elements from the tail half of " { $snippet "u" } " and " { $snippet "v" } "." }
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{ $notes "For hardware-supported SIMD vector types this word compiles to a single instruction." }
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{ $examples
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{ $example """USING: kernel math.vectors prettyprint ;
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{ "A" "B" "C" "D" } { "1" "2" "3" "4" } vmerge-tail ."""
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{ "A" "B" "C" "D" } { "1" "2" "3" "4" } (vmerge-tail) ."""
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"""{ "C" "3" "D" "4" }"""
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} } ;
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{ vmerge vmerge-head vmerge-tail } related-words
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{ vmerge (vmerge) (vmerge-head) (vmerge-tail) } related-words
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HELP: vbroadcast
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{ $values { "u" "a SIMD array" } { "n" "a non-negative integer" } { "v" "a SIMD array" } }
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@ -91,10 +91,15 @@ PRIVATE>
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: hlshift ( u n -- w ) '[ _ <byte-array> prepend 16 head ] change-underlying ;
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: hrshift ( u n -- w ) '[ _ <byte-array> append 16 tail* ] change-underlying ;
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: vmerge-head ( u v -- h ) over length 2 / '[ _ head-slice ] bi@ [ zip ] keep concat-as ;
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: vmerge-tail ( u v -- t ) over length 2 / '[ _ tail-slice ] bi@ [ zip ] keep concat-as ;
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: (vmerge-head) ( u v -- h )
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over length 2 /i '[ _ head-slice ] bi@ [ zip ] keep concat-as ;
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: (vmerge-tail) ( u v -- t )
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over length 2 /i '[ _ tail-slice ] bi@ [ zip ] keep concat-as ;
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: vmerge ( u v -- h t ) [ vmerge-head ] [ vmerge-tail ] 2bi ; inline
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: (vmerge) ( u v -- h t )
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[ (vmerge-head) ] [ (vmerge-tail) ] 2bi ; inline
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||||
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||||
: vmerge ( u v -- w ) [ zip ] keep concat-as ;
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: vand ( u v -- w ) over '[ [ _ element>bool ] bi@ and ] 2map ;
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: vandn ( u v -- w ) over '[ [ _ element>bool ] bi@ [ not ] dip and ] 2map ;
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||||
|
|
|
@ -120,7 +120,7 @@ TYPED:: m4^n ( m: matrix4 n: fixnum -- m^n: matrix4 )
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identity-matrix4 n [ m m4. ] times ;
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: vmerge-diagonal* ( x y -- h t )
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[ vmerge-head ] [ swap vmerge-tail ] 2bi ; inline
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[ (vmerge-head) ] [ swap (vmerge-tail) ] 2bi ; inline
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||||
: vmerge-diagonal ( x -- h t )
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0.0 float-4-with vmerge-diagonal* ; inline
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|
@ -128,7 +128,7 @@ TYPED: diagonal-matrix4 ( diagonal: float-4 -- matrix: matrix4 )
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[ vmerge-diagonal [ vmerge-diagonal ] bi@ ] make-matrix4 ;
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: vmerge-transpose ( a b c d -- a' b' c' d' )
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[ vmerge ] bi-curry@ bi* ; inline
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[ (vmerge) ] bi-curry@ bi* ; inline
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||||
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TYPED: transpose-matrix4 ( matrix: matrix4 -- matrix: matrix4 )
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[ rows vmerge-transpose vmerge-transpose ] make-matrix4 ;
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|
@ -144,8 +144,8 @@ TYPED:: translation-matrix4 ( offset: float-4 -- matrix: matrix4 )
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[
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float-4{ 1.0 1.0 1.0 1.0 } :> diagonal
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offset 0 float-4-with vmerge
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[ 0 float-4-with swap vmerge ] bi@ drop :> z :> y :> x
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offset 0 float-4-with (vmerge)
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[ 0 float-4-with swap (vmerge) ] bi@ drop :> z :> y :> x
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diagonal y vmerge-diagonal*
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[ x vmerge-diagonal* ]
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|
@ -194,7 +194,7 @@ TYPED:: frustum-matrix4 ( xy: float-4 near: float far: float -- matrix: matrix4
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float-4{ t t f f } xy near far - float-4-with v? ! denom
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v/ :> fov
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||||
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||||
fov 0.0 float-4-with vmerge-head vmerge-diagonal
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fov 0.0 float-4-with (vmerge-head) vmerge-diagonal
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fov float-4{ f f t t } vand
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||||
float-4{ 0.0 0.0 -1.0 0.0 }
|
||||
] make-matrix4 ;
|
||||
|
|
|
@ -30,6 +30,7 @@ const char *default_image_path()
|
|||
char *new_path = new char[PATH_MAX + SUFFIX_LEN + 1];
|
||||
memcpy(new_path,path,len + 1);
|
||||
memcpy(new_path + len,SUFFIX,SUFFIX_LEN + 1);
|
||||
free(const_cast<char *>(path));
|
||||
return new_path;
|
||||
}
|
||||
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
namespace factor
|
||||
{
|
||||
|
||||
/* Snarfed from SBCL linux-so.c. You must delete[] the result yourself. */
|
||||
/* Snarfed from SBCL linux-so.c. You must free() the result yourself. */
|
||||
const char *vm_executable_path()
|
||||
{
|
||||
char *path = new char[PATH_MAX + 1];
|
||||
|
@ -17,7 +17,10 @@ const char *vm_executable_path()
|
|||
else
|
||||
{
|
||||
path[size] = '\0';
|
||||
return safe_strdup(path);
|
||||
|
||||
const char *ret = safe_strdup(path);
|
||||
delete[] path;
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in New Issue