Fix PICs for x86-64
parent
48dbd4022c
commit
f9ec0a07c5
|
@ -98,7 +98,7 @@ SYMBOL: jit-define-rt
|
|||
SYMBOL: jit-define-offset
|
||||
|
||||
: compute-offset ( -- offset )
|
||||
building get length jit-define-rc get rc-absolute-cell = cell 4 ? - ;
|
||||
building get length jit-define-rc get rc-absolute-cell = bootstrap-cell 4 ? - ;
|
||||
|
||||
: jit-rel ( rc rt -- )
|
||||
jit-define-rt set
|
||||
|
|
|
@ -241,6 +241,7 @@ big-endian off
|
|||
temp0 0 MOV rc-absolute-cell rt-immediate jit-rel
|
||||
! key = class
|
||||
temp2 temp1 MOV
|
||||
bootstrap-cell 8 = [ temp2 1 SHL ] when
|
||||
! key &= cache.length - 1
|
||||
temp2 mega-cache-size get 1- bootstrap-cell * AND
|
||||
! cache += array-start-offset
|
||||
|
|
|
@ -78,6 +78,6 @@ DEF(F_FASTCALL void,primitive_inline_cache_miss,(void)):
|
|||
sub $STACK_PADDING,%rsp
|
||||
call MANGLE(inline_cache_miss)
|
||||
add $STACK_PADDING,%rsp
|
||||
jmp *WORD_XT_OFFSET(%rax)
|
||||
jmp *%rax
|
||||
|
||||
#include "cpu-x86.S"
|
||||
|
|
|
@ -25,11 +25,11 @@ INLINE void check_call_site(CELL return_address)
|
|||
INLINE CELL get_call_target(CELL return_address)
|
||||
{
|
||||
check_call_site(return_address);
|
||||
return *(F_FIXNUM *)(return_address - 4) + return_address;
|
||||
return *(int *)(return_address - 4) + return_address;
|
||||
}
|
||||
|
||||
INLINE void set_call_target(CELL return_address, CELL target)
|
||||
{
|
||||
check_call_site(return_address);
|
||||
*(F_FIXNUM *)(return_address - 4) = (target - return_address);
|
||||
*(int *)(return_address - 4) = (target - return_address);
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue