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cpu.x86: don't clobber src in %dispatch

db4
Slava Pestov 2009-06-30 16:47:22 -05:00
parent b61b47922f
commit fc6c9e2dfd
2 changed files with 4 additions and 4 deletions
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4
basis/cpu/x86/32/32.factor
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@ -29,10 +29,10 @@ M: x86.32 temp-reg-2 EDX ;
M:: x86.32 %dispatch ( src temp -- )
! Load jump table base.
src HEX: ffffffff ADD
temp src HEX: ffffffff [+] LEA
0 rc-absolute-cell rel-here
! Go
src HEX: 7f [+] JMP
temp HEX: 7f [+] JMP
! Fix up the displacement above
cell code-alignment
[ 7 + building get dup pop* push ]

4
basis/cpu/x86/64/64.factor
View File

@ -27,8 +27,8 @@ M:: x86.64 %dispatch ( src temp -- )
temp HEX: ffffffff MOV
0 rc-absolute-cell rel-here
! Add jump table base
src temp ADD
src HEX: 7f [+] JMP
temp src ADD
temp HEX: 7f [+] JMP
! Fix up the displacement above
cell code-alignment
[ 15 + building get dup pop* push ]