cpu.x86.32: update for resumable signal handlers
Joe Groff
parent
d6eae2f42d
commit
ff2d480d98
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@ -4,7 +4,7 @@ USING: bootstrap.image.private kernel kernel.private namespaces
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system cpu.x86.assembler cpu.x86.assembler.operands layouts
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vocabs parser compiler.constants compiler.codegen.relocation
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sequences math math.private generic.single.private
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threads.private ;
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threads.private locals ;
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IN: bootstrap.x86
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4 \ cell set
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@ -23,6 +23,7 @@ IN: bootstrap.x86
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: vm-reg ( -- reg ) EBX ;
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: ctx-reg ( -- reg ) EBP ;
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: nv-regs ( -- seq ) { ESI EDI EBX } ;
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: volatile-regs ( -- seq ) { EAX ECX EDX } ;
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: nv-reg ( -- reg ) ESI ;
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: ds-reg ( -- reg ) ESI ;
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: rs-reg ( -- reg ) EDI ;
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@ -34,12 +35,12 @@ IN: bootstrap.x86
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0 CALL f rc-relative rel-dlsym ;
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[
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! store entry point
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ESP bootstrap-cell 2 * neg [+] 0 MOV rc-absolute-cell rel-this
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! store stack frame size
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ESP bootstrap-cell neg [+] stack-frame-size MOV
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! alignment
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ESP stack-frame-size bootstrap-cell - SUB
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! store entry point
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ESP stack-frame-size 3 bootstrap-cells - [+] 0 MOV rc-absolute-cell rel-this
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! store stack frame size
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ESP stack-frame-size 2 bootstrap-cells - [+] stack-frame-size MOV
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] jit-prolog jit-define
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[
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@ -96,6 +97,36 @@ IN: bootstrap.x86
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"end_callback" jit-call
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] \ c-to-factor define-sub-primitive
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! The signal-handler and leaf-signal-handler subprimitives are special-cased
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! in vm/quotations.cpp not to trigger generation of a stack frame, so they can
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! peform their own prolog/epilog preserving registers.
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:: jit-signal-handler-prolog ( -- frame-size )
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stack-frame-size 8 bootstrap-cells + :> frame-size
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ESP frame-size bootstrap-cell - SUB ! minus a cell for return address
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ESP [] EAX MOV
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ESP 1 bootstrap-cells [+] ECX MOV
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ESP 2 bootstrap-cells [+] EDX MOV
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ESP 3 bootstrap-cells [+] EBX MOV
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ESP 4 bootstrap-cells [+] EBP MOV
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ESP 5 bootstrap-cells [+] ESI MOV
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ESP 6 bootstrap-cells [+] EDI MOV
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ESP frame-size 3 bootstrap-cells - [+] 0 MOV rc-absolute-cell rel-this
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ESP frame-size 2 bootstrap-cells - [+] frame-size MOV
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! subprimitive definition assumes vm's been loaded
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jit-load-vm
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frame-size ;
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:: jit-signal-handler-epilog ( frame-size -- )
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EAX ESP [] MOV
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ECX ESP 1 bootstrap-cells [+] MOV
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EDX ESP 2 bootstrap-cells [+] MOV
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EBX ESP 3 bootstrap-cells [+] MOV
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EBP ESP 4 bootstrap-cells [+] MOV
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ESI ESP 5 bootstrap-cells [+] MOV
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EDI ESP 6 bootstrap-cells [+] MOV
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ESP frame-size bootstrap-cell - ADD ;
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[
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EAX ds-reg [] MOV
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ds-reg bootstrap-cell SUB
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@ -4,7 +4,7 @@ USING: bootstrap.image.private kernel kernel.private namespaces
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system layouts vocabs parser compiler.constants
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compiler.codegen.relocation math math.private cpu.x86.assembler
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cpu.x86.assembler.operands sequences generic.single.private
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threads.private ;
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threads.private locals ;
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IN: bootstrap.x86
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8 \ cell set
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@ -91,9 +91,7 @@ IN: bootstrap.x86
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"end_callback" jit-call
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] \ c-to-factor define-sub-primitive
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USE: locals
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:: jit-save-volatile-regs ( -- frame-size )
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:: jit-signal-handler-prolog ( -- frame-size )
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! do we also need to save XMM?
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volatile-regs length bootstrap-cells 16 align stack-frame-size + :> frame-size
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RSP frame-size bootstrap-cell - SUB ! minus a cell for return address
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@ -105,43 +103,11 @@ USE: locals
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RSP frame-size 2 bootstrap-cells - [+] frame-size MOV
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frame-size ;
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:: jit-restore-volatile-regs ( frame-size -- )
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:: jit-signal-handler-epilog ( frame-size -- )
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volatile-regs
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[| r i | r RSP i bootstrap-cells [+] MOV ] each-index
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RSP frame-size bootstrap-cell - ADD ;
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! The signal-handler and leaf-signal-handler subprimitives are special-cased
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! in vm/quotations.cpp not to trigger generation of a stack frame, so they can
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! peform their own prolog/epilog preserving registers.
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[| |
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jit-save-volatile-regs :> frame-size
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jit-save-context
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RAX vm-reg vm-signal-handler-addr-offset [+] MOV
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RAX CALL
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frame-size jit-restore-volatile-regs
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] \ signal-handler define-sub-primitive
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[| |
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jit-save-volatile-regs :> frame-size
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jit-save-context
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RAX vm-reg vm-signal-handler-addr-offset [+] MOV
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RAX CALL
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! Stack at this point has a fake stack frame set up to represent the
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! leaf procedure we interrupted. We must tear down that frame in
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! addition to our own before resuming.
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! Grab our frame's return address and place it just underneath the leaf proc's
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! return address, since we can't touch any registers once they've been
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! restored. If we got this far there should be no faults here and we
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! can get away with corrupting the stack frame.
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RAX RSP frame-size bootstrap-cell - [+] MOV
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RSP frame-size 2 bootstrap-cells + [+] RAX MOV
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! Popping 3 extra cells here leaves the resume address at the top of the stack
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! when we RET.
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frame-size 3 bootstrap-cells + jit-restore-volatile-regs
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] \ leaf-signal-handler define-sub-primitive
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[
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arg1 ds-reg [] MOV
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ds-reg bootstrap-cell SUB
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@ -3,7 +3,7 @@
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USING: bootstrap.image.private compiler.constants
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compiler.codegen.relocation compiler.units cpu.x86.assembler
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cpu.x86.assembler.operands kernel kernel.private layouts
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locals.backend make math math.private namespaces sequences
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locals locals.backend make math math.private namespaces sequences
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slots.private strings.private vocabs ;
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IN: bootstrap.x86
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@ -102,6 +102,38 @@ big-endian off
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0 CALL f rc-relative rel-word-pic
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] jit-word-call jit-define
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! The signal-handler and leaf-signal-handler subprimitives are special-cased
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! in vm/quotations.cpp not to trigger generation of a stack frame, so they can
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! peform their own prolog/epilog preserving registers.
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[| |
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jit-signal-handler-prolog :> frame-size
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jit-save-context
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temp0 vm-reg vm-signal-handler-addr-offset [+] MOV
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temp0 CALL
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frame-size jit-signal-handler-epilog
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] \ signal-handler define-sub-primitive
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[| |
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jit-signal-handler-prolog :> frame-size
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jit-save-context
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temp0 vm-reg vm-signal-handler-addr-offset [+] MOV
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temp0 CALL
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! Stack at this point has a fake stack frame set up to represent the
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! leaf procedure we interrupted. We must tear down that frame in
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! addition to our own before resuming.
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! Grab our frame's return address and place it just underneath the leaf proc's
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! return address, since we can't touch any registers once they've been
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! restored. If we got this far there should be no faults here and we
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! can get away with corrupting the stack frame.
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temp0 stack-reg frame-size bootstrap-cell - [+] MOV
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stack-reg frame-size stack-frame-size + 2 bootstrap-cells - [+] temp0 MOV
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! Pop enough of the fake frame to leave the resume address at the top of the
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! stack when we RET.
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frame-size stack-frame-size + bootstrap-cell - jit-signal-handler-epilog
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] \ leaf-signal-handler define-sub-primitive
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[
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! load boolean
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temp0 ds-reg [] MOV
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@ -102,9 +102,10 @@ void factor_vm::dispatch_signal_handler(cell *sp, cell *pc, cell handler)
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// Make a fake frame for the leaf procedure
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cell leaf_word = find_word_for_address(this, *pc);
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cell newsp = *sp - 4 * sizeof(cell);
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*(cell*)(newsp + 3*sizeof(cell)) = 4*sizeof(cell);
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*(cell*)(newsp + 2*sizeof(cell)) = leaf_word;
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// XXX get platform-appropriate stack frame size
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cell newsp = *sp - 32;
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*(cell*)(newsp + 32 - sizeof(cell)) = 32;
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*(cell*)(newsp + 32 - 2*sizeof(cell)) = leaf_word;
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*(cell*) newsp = *pc;
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*sp = newsp;
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handler_word = tagged<word>(special_objects[LEAF_SIGNAL_HANDLER_WORD]);
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