02b1cc0c40
compiler.cfg.linear-scan.assignment: more efficient data structures
2009-07-29 06:12:33 -05:00
bbd4e4af3e
compiler.cfg: Minor optimization. Instructions can now only ever produce a single value; this eliminates 1array constructions and some iterations
2009-07-28 12:29:07 -05:00
f19ee61d3a
compiler.cfg.linear-scan: use compiler.cfg.parallel-copy in resolve pass
2009-07-28 07:39:46 -05:00
c355c21de6
Move liveness back to compiler.cfg.liveness, fix a corner-case where it didn't work on some forms of non-SSA code
2009-07-22 06:07:28 -05:00
5d9f7b0ed2
compiler.cfg: Major restructuring -- do not compute liveness before local optimization, and instead change local optimizations to be more permissive of undefined values. Now, liveness is only computed once, after phi elimination and before register allocation. This means liveness analysis does not need to take phi nodes into account and can now use the new compiler.cfg.dataflow-analysis framework
2009-07-22 03:08:28 -05:00
9d831baa9c
compiler.cfg.linear-scan: algorithmic optimizations
2009-07-18 00:14:39 -05:00
2c3fb59f4f
compiler.cfg.linear-scan: fix fencepost error in spill insertion
2009-07-10 03:58:51 -05:00
f93a71e978
compiler.cfg.linear-scan: two live intervals which are coalesced will use the same spill slot
2009-07-09 23:12:49 -05:00
65cb2d84a7
compiler.cfg.linear-scan: split off parallel mapping code from resolve pass, use it in assignment pass to resolve parallel copies
2009-07-08 23:07:06 -05:00
4ef76762e3
compiler.cfg.linear-scan: debugging spilling, add more assertions
2009-07-07 13:01:27 -05:00
15134e61e0
compiler.cfg.linear-scan: Re-implement spilling, add some additional runtime assertions, simplify assignment pass since it doesn't have to track spill slots anymore; just assume a live value that's not in active or inactive is spilled
2009-07-07 03:28:55 -05:00
d6f45a5216
compiler.cfg.linear-scan: minor fixes
2009-07-05 22:51:53 -05:00
0a634ec4ec
Fix compiler.cfg.linear-scan.resolve test failure
2009-07-04 16:30:16 -05:00
c431e0db99
compiler.cfg.linear-scan.resolve: More fixes
2009-07-04 00:45:06 -05:00
ab5fdc70ac
compiler.cfg.linear-scan: redo resolve pass to fix a correctness issue
2009-07-03 23:38:52 -05:00
12cbbbd6ad
compiler.cfg: clean up GC check generation to use spill-slot data type
2009-07-03 23:11:23 -05:00
04508f2ece
compiler.cfg: bug fixes in GC check insertion and fixnum intrinsics
2009-07-02 00:51:06 -05:00
14bce3b400
compiler.cfg.linear-scan: debugging spilling and resolve pass
2009-07-01 17:41:07 -05:00
189043eae7
compiler.cfg.linear-scan.assignment: insert-copy did the wrong thing if the second interval had been split. Fixes compilation of 'trilerp'
2009-06-30 21:07:39 -05:00
87aabfc053
compiler.cfg.linear-scan.assignment: get check-assignment? to work with coalescing
2009-06-30 18:10:53 -05:00
ecf44c98bc
compiler.cfg.linear-scan: compute-free-pos was broken in the case where more than one inactive interval had the same physical register assigned
2009-06-30 16:07:58 -05:00
39dba00279
compiler.cfg.linear-scan: Working on resolve pass
2009-06-21 00:20:01 -05:00
886967256e
compiler.cfg.linear-scan.assignment: correctly compute live registers at GC check points
2009-06-20 15:33:12 -05:00
941d7a1eeb
Various linear scan fixes
...
insert spill before reload to fix x86-32 regression
inactive splitting: if all inactive intervals' registers are in use, don't fail
fix stack analysis tests
2009-06-13 17:35:40 -05:00
d09ece8152
Split up compiler.cfg.linear-scan.allocation into a number of sub-vocabularies; start work on compiler.cfg.linear-scan.resolve; start work on inactive interval splitting
2009-06-11 17:55:14 -05:00
ad5ef2a3cc
Linear scan: correctly compute live spill slots
2009-06-05 18:06:47 -05:00
ee67b7c9a8
compiler.cfg.linear-scan: re-do interval splitting to operate on live ranges; add inactive set processing
2009-06-04 18:53:02 -05:00
7aca076408
GC checks now save and restore registers
2009-06-02 18:23:47 -05:00
0375ce6bb4
Fix scoping issue in compiler.cfg.linear-scan.assignment
2009-05-31 18:21:23 -05:00
968a9bb666
Various codegen improvements:
...
- new-insn word to construct instructions
- cache RPO in the CFG
- re-organize low-level optimizer so that MR is built after register allocation
- register allocation now stores instruction numbers in the instructions themselves
- split defs-vregs into defs-vregs and temp-vregs
2009-05-29 13:11:34 -05:00
d11a779fdd
RicE
2008-11-02 03:58:32 -06:00
f092622fac
CFG IR is now pure SSA
2008-10-20 01:56:28 -05:00
c0d89b061e
Fixing register allocator prspilling
2008-10-19 01:10:21 -05:00
7b6d9c4c4f
Debugging new codegen
2008-10-07 20:00:38 -05:00
f436fd0c0f
Merging in new codegen
2008-10-07 16:16:50 -05:00
Slava Pestov
Slava Pestov