3fb4fc1bde
Improve code generation for shift word: add intrinsics for fixnum-shift-fast in the case where the shift count is not constant, transform 1 swap shift into a more overflow check with open-coded fast case, transform bitand into fixnum-bitand in more cases
2009-07-16 23:50:48 -05:00
11731f8d48
compiler.cfg.value-numbering: merge in compiler.cfg.branch-folding
2009-07-14 20:05:01 -05:00
73a2222541
compiler.cfg.value-numbering: branch folding
2009-07-14 19:17:12 -05:00
2ace87370e
compiler.cfg.value-numbering: more optimizations
2009-07-14 16:05:25 -05:00
5ccf7bc99f
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-13 22:59:19 -05:00
ccae9b59a4
clean up value numbering conversion of ##add/sub to ##add/sub-imm
2009-07-13 19:02:05 -05:00
768e2a5148
compiler.cfg: split off condition codes into a comparisons sub-vocabulary
2009-07-13 14:42:52 -05:00
3b244d5d41
compiler.cfg.value-numbering: fix ##compare and ##compare-branch rewrites
2009-07-13 12:33:58 -05:00
c0f1b2205a
compiler.cfg.value-numbering.rewrite: disable ##compare optimizations for now
2009-07-04 03:26:37 -05:00
fb488025aa
compiler.cfg.value-numbering.rewrite: fix ##compare-imm rewrite rule
2009-07-04 02:50:50 -05:00
cae8fed16c
convert ##compare with immediates to ##compare-imm
2009-07-03 19:19:33 -05:00
e7a227ad40
add constant folding for integer ops, refactor some rewrites
2009-07-02 19:03:21 -05:00
80eb5068e2
fix bug in rewriting #add -- wasn't checking small-enough?, and change negative adds to subtractions/negative subtractions to adds
2009-07-02 17:55:35 -05:00
86901eb01e
rewrite rules for add/sub/mul/and/or/xor-imm, rewrite load-immediate/add to be add-imm
2009-07-02 11:35:31 -05:00
ded1e29d2f
combine add-imm instructions into a single add
2009-06-30 22:59:53 -05:00
d558545b65
Remove obsolete optimization
2009-06-01 03:05:49 -05:00
3a9922d161
Fix compiler errors
2009-06-01 03:00:10 -05:00
e04df76f60
Various codegen improvements:
...
- new-insn word to construct instructions
- cache RPO in the CFG
- re-organize low-level optimizer so that MR is built after register allocation
- register allocation now stores instruction numbers in the instructions themselves
- split defs-vregs into defs-vregs and temp-vregs
2009-05-29 13:11:34 -05:00
ab689c098b
Clean up direct literal code and make a first attempt at PowerPC support
2008-11-24 08:16:14 -06:00
eb05dd3a12
Optimize a ##dispatch that is applied to the result of a ##sub-imm or ##add-imm; this eliminates an instruction from the common 1 fixnum-fast { ... } dispatch and 8 fixnum-fast { ... } dispatch code sequences appearing in generic word expansions
2008-11-13 04:16:08 -06:00
64cbf619a9
Add more algebraic simplifications: comparison of a comparison, comparison where first is immediate
2008-11-06 09:27:52 -06:00
492a15e345
Move insn class to compiler.cfg.instructions
2008-10-24 09:17:06 -05:00
885adc8dc9
Various improvements
2008-10-23 05:27:54 -05:00
52967c5bf1
Improved value numbering
2008-10-23 02:49:26 -05:00
Slava Pestov
Doug Coleman
Slava Pestov