f44506089d
More work on overflow instructions: don't need temp register anymore, add -tail variants which don't need stack frame
2008-11-28 06:36:30 -06:00
5634becda1
##fixnum-add, ##fixnum-sub instructions open-code overflow check
2008-11-28 05:33:58 -06:00
ab689c098b
Clean up direct literal code and make a first attempt at PowerPC support
2008-11-24 08:16:14 -06:00
eb05dd3a12
Optimize a ##dispatch that is applied to the result of a ##sub-imm or ##add-imm; this eliminates an instruction from the common 1 fixnum-fast { ... } dispatch and 8 fixnum-fast { ... } dispatch code sequences appearing in generic word expansions
2008-11-13 04:16:08 -06:00
b1aa3697cb
Emit branches in the same order they're written in code
2008-11-13 03:52:01 -06:00
26f309d2ae
Trying to make PEGs compile faster by reducing the number of low level IR nodes: merge functionality of #>r and #r> into #shuffle, and generate 1 node instead of 3 for calls to get-local
2008-11-11 18:46:31 -06:00
5b7d40d9b4
We need to end the basic block after the ##prologue in the dispatch branch so that the GC check can go after the prologue
2008-11-10 02:58:05 -06:00
d1f248dac6
Fixing PowerPC backend: prolog register clobberage, spilling, and general stack frame usage. Add some lame tests for spilling
2008-11-06 19:00:56 -06:00
4e55cd973b
If a #dispatch branch is a call to another word which is not an intrinsic, we avoid generating the dispatch branch and just jump to the word directly
2008-11-06 11:48:55 -06:00
64cbf619a9
Add more algebraic simplifications: comparison of a comparison, comparison where first is immediate
2008-11-06 09:27:52 -06:00
1c1333fbe9
Compile not and >boolean as branchless intrinsics by having the CFG builder detect certain code patterns
2008-11-06 09:09:21 -06:00
d2ec46e38f
PowerPC backend almost functional; some new compiler unit tests added,
...
better compilation of 'f eq?'; f becomes an immediate operand
move aux-offset to compiler.constants
2008-11-06 06:27:27 -06:00
53cd75b06c
Add string-nth intrinsic
2008-11-06 01:11:28 -06:00
cc879fa9b7
Tuple layouts are now arrays, instead of built-in types. The superclass
...
array is now part of the tuple layout object itself, and class hashcodes
are stored alongside class words there. This removes 2 indirections when
reading a superclass, and 3 when reading a superclass hashcode.
2008-11-05 22:20:29 -06:00
c8521ad826
Add tool to dump live intervals
2008-11-04 17:23:20 -06:00
1af3b8ed65
If a register is spilled and the reload location is also a copy, we chicken out and don't coalesce. This is suboptimal but it's not clear to me how to implement it cleanly, and SSA graph coloring will solve this problem eventually anyway
2008-11-04 00:32:56 -06:00
efcb916e35
Handle a jump to a jump by cloning the block, in the same way we optimize jumps to returns
2008-11-03 21:02:34 -06:00
82e9eedd39
Forgot about float= intrinsic
2008-11-03 07:15:09 -06:00
59f4f25b91
Loop alignment: appears to be a small win for reverse-complement
2008-11-03 06:20:51 -06:00
0250d7c1d2
Forgot a drop in unit test
2008-11-03 01:53:27 -06:00
08b277e892
Fix alias anlaysis bug: result of ##box-alien and ##box-float did not get an AC, so calling hi-tag would not compile
2008-11-03 01:52:55 -06:00
f253e74942
Inline subprimitives in optimizing compiler
2008-11-03 01:18:54 -06:00
445e353337
Optimize away useless jumps
2008-11-02 23:09:31 -06:00
d11a779fdd
RicE
2008-11-02 03:58:32 -06:00
3834eaeb05
Don't generate GC checks if the allocation instruction is optimized out
2008-11-02 01:50:48 -06:00
8df1aba71d
Coalescing
2008-11-02 01:49:57 -06:00
804c6f93ea
Fix x86.32
2008-10-31 21:07:41 -05:00
db4db19cd9
Start working on coalescing
2008-10-28 02:38:37 -07:00
492a15e345
Move insn class to compiler.cfg.instructions
2008-10-24 09:17:06 -05:00
885adc8dc9
Various improvements
2008-10-23 05:27:54 -05:00
52967c5bf1
Improved value numbering
2008-10-23 02:49:26 -05:00
d723b69990
Value numbering
2008-10-22 21:59:07 -05:00
084e64d0bc
Tweak inheritance
2008-10-22 21:58:46 -05:00
ba0ed21e1d
Better error message
2008-10-22 21:58:37 -05:00
9a07760542
CFG optimizer
2008-10-22 18:41:37 -05:00
3711aa3bca
Stack height normalization
2008-10-22 18:41:26 -05:00
6d812aaa52
Write barrier elimination
2008-10-22 18:41:10 -05:00
1f693b50b3
Massive focused action
2008-10-22 18:39:41 -05:00
73d01452cb
Replace ##gc with a gc flag in the basic block
2008-10-22 18:38:30 -05:00
f09813f6fd
Alias analysis
2008-10-22 18:37:47 -05:00
1b06ab1b39
Fixing various bugs
2008-10-21 23:17:32 -05:00
94a2bfa2ea
Working on comparison operations, clearing out remaining dead wood
2008-10-21 03:20:48 -05:00
df498c21a3
Trim USING:
2008-10-20 20:46:47 -05:00
e92f795a76
More work on intrinsics; memory allocation and slot access now expands correctly
2008-10-20 20:40:15 -05:00
37cf7d9a9c
Add SSA comparison instructions, fix various problems
2008-10-20 05:55:20 -05:00
f092622fac
CFG IR is now pure SSA
2008-10-20 01:56:28 -05:00
14d8696f40
Oops, don't mix register classes in active set
2008-10-19 03:34:42 -05:00
c0d89b061e
Fixing register allocator prspilling
2008-10-19 01:10:21 -05:00
627dfd1ff5
Finish vreg simplification
2008-10-17 20:03:59 -05:00
239578353f
Simplifying vregs work in progress
2008-10-17 15:35:04 -05:00
Slava Pestov
sheeple