Slava Pestov
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3834eaeb05
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Don't generate GC checks if the allocation instruction is optimized out
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2008-11-02 01:50:48 -06:00 |
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Slava Pestov
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8df1aba71d
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Coalescing
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2008-11-02 01:49:57 -06:00 |
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Slava Pestov
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804c6f93ea
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Fix x86.32
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2008-10-31 21:07:41 -05:00 |
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Slava Pestov
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db4db19cd9
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Start working on coalescing
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2008-10-28 02:38:37 -07:00 |
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Slava Pestov
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492a15e345
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Move insn class to compiler.cfg.instructions
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2008-10-24 09:17:06 -05:00 |
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Slava Pestov
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885adc8dc9
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Various improvements
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2008-10-23 05:27:54 -05:00 |
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Slava Pestov
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52967c5bf1
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Improved value numbering
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2008-10-23 02:49:26 -05:00 |
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Slava Pestov
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d723b69990
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Value numbering
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2008-10-22 21:59:07 -05:00 |
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Slava Pestov
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084e64d0bc
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Tweak inheritance
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2008-10-22 21:58:46 -05:00 |
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Slava Pestov
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ba0ed21e1d
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Better error message
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2008-10-22 21:58:37 -05:00 |
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Slava Pestov
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9a07760542
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CFG optimizer
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2008-10-22 18:41:37 -05:00 |
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Slava Pestov
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3711aa3bca
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Stack height normalization
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2008-10-22 18:41:26 -05:00 |
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Slava Pestov
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6d812aaa52
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Write barrier elimination
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2008-10-22 18:41:10 -05:00 |
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Slava Pestov
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1f693b50b3
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Massive focused action
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2008-10-22 18:39:41 -05:00 |
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Slava Pestov
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73d01452cb
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Replace ##gc with a gc flag in the basic block
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2008-10-22 18:38:30 -05:00 |
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Slava Pestov
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f09813f6fd
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Alias analysis
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2008-10-22 18:37:47 -05:00 |
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Slava Pestov
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1b06ab1b39
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Fixing various bugs
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2008-10-21 23:17:32 -05:00 |
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Slava Pestov
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94a2bfa2ea
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Working on comparison operations, clearing out remaining dead wood
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2008-10-21 03:20:48 -05:00 |
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Slava Pestov
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df498c21a3
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Trim USING:
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2008-10-20 20:46:47 -05:00 |
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Slava Pestov
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e92f795a76
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More work on intrinsics; memory allocation and slot access now expands correctly
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2008-10-20 20:40:15 -05:00 |
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Slava Pestov
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37cf7d9a9c
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Add SSA comparison instructions, fix various problems
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2008-10-20 05:55:20 -05:00 |
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Slava Pestov
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f092622fac
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CFG IR is now pure SSA
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2008-10-20 01:56:28 -05:00 |
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Slava Pestov
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14d8696f40
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Oops, don't mix register classes in active set
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2008-10-19 03:34:42 -05:00 |
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Slava Pestov
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c0d89b061e
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Fixing register allocator prspilling
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2008-10-19 01:10:21 -05:00 |
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Slava Pestov
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627dfd1ff5
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Finish vreg simplification
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2008-10-17 20:03:59 -05:00 |
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Slava Pestov
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239578353f
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Simplifying vregs work in progress
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2008-10-17 15:35:04 -05:00 |
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Slava Pestov
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ae3c4ae1b6
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Fix some problems with callbacks
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2008-10-12 23:32:14 -05:00 |
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Slava Pestov
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749c77d6b1
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Fix linear scan test
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2008-10-12 18:40:10 -05:00 |
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Slava Pestov
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b2ade7f556
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Fix callbacks and non-tailcalls to dispatch
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2008-10-12 17:37:26 -05:00 |
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Slava Pestov
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5f93ab74e4
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Fix #dispatch generation
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2008-10-12 16:46:59 -05:00 |
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Slava Pestov
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68c9b22cef
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Don't need known-tag templates any more
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2008-10-11 14:08:00 -05:00 |
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Slava Pestov
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f979ae5b82
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Expand slot accessors further to avoid having to use complex template decision
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2008-10-11 14:05:15 -05:00 |
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Slava Pestov
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3844cb62d8
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Fix %write-barrier
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2008-10-10 03:16:26 -05:00 |
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Slava Pestov
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3e29808f17
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Fix loop compilation
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2008-10-10 02:33:32 -05:00 |
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Slava Pestov
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cf46a832e7
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Debugging register allocator and inline allocation
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2008-10-08 23:42:53 -05:00 |
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Slava Pestov
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0e4e05d5cd
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Debugging new codegen
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2008-10-08 03:51:44 -05:00 |
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Slava Pestov
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7b6d9c4c4f
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Debugging new codegen
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2008-10-07 20:00:38 -05:00 |
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Slava Pestov
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f436fd0c0f
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Merging in new codegen
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2008-10-07 16:16:50 -05:00 |