Joe Groff
025a5b7b15
split unordered and ordered float comparison intrinsics in compiler; generate only unordered comparisons for now
2009-09-08 17:04:26 -05:00
Slava Pestov
775b9af2f7
compiler: eliminate boilerplate by centralizing info in declarative INSN: syntax
2009-09-02 06:22:37 -05:00
Slava Pestov
99bf9fadfb
Performance improvements to make struct-arrays benchmark faster
...
- improved optimization of ##unbox-any-c-ptr on ##box-displaced-alien; convert it to ##unbox-c-ptr where possible using class info stored in the ##bda instruction
- make fcos, fsin, etc inline again; everything in math.libm inline again, except for fsqrt which is an intrinsic
- convert min and max on floats to float-min and float-max
- make min and max not inline, so that the above can work
- struct-arrays: rice a bit so that more fixnums come up
2009-08-28 05:21:16 -05:00
Slava Pestov
9caf3f9248
compiler: new inline intrinsic for <displaced-alien> where the inputs have known types; value numbering now eliminates unnecessary allocation of displaced aliens if the result is immediately unboxed again
2009-08-27 00:06:19 -05:00
Slava Pestov
2d575d7ec9
compiler.cfg: virtual registers are integers now, and representations are stored off to the side. Fix bug in representation selection that would manifest if a value was used as a float and a fixnum in different branches; cannot globally unbox float in this case
2009-08-08 04:02:18 -05:00
Slava Pestov
c49d2cc7bc
compiler.cfg.value-numbering: insert ##copy instructions for instructions whose expressions simplify. While subsequent usages are replaced with the instruction computing the simplified vreg locally, global usages may exist of the original instruction. In this case, the ##copy is not dead
2009-07-24 05:30:30 -05:00
Slava Pestov
39a70db831
Improve code generation for shift word: add intrinsics for fixnum-shift-fast in the case where the shift count is not constant, transform 1 swap shift into a more overflow check with open-coded fast case, transform bitand into fixnum-bitand in more cases
2009-07-16 23:50:48 -05:00
Slava Pestov
b65ef327ce
compiler.cfg.value-numbering: merge in compiler.cfg.branch-folding
2009-07-14 20:05:01 -05:00
Slava Pestov
bea69ea325
compiler.cfg.value-numbering: branch folding
2009-07-14 19:17:12 -05:00
Slava Pestov
2e6ae2153c
compiler.cfg.value-numbering: more optimizations
2009-07-14 16:05:25 -05:00
Slava Pestov
dff25199cb
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-13 22:59:19 -05:00
Doug Coleman
83d8c8606d
clean up value numbering conversion of ##add/sub to ##add/sub-imm
2009-07-13 19:02:05 -05:00
Slava Pestov
1eae4286cd
compiler.cfg: split off condition codes into a comparisons sub-vocabulary
2009-07-13 14:42:52 -05:00
Slava Pestov
eda950a3bf
compiler.cfg.value-numbering: fix ##compare and ##compare-branch rewrites
2009-07-13 12:33:58 -05:00
Slava Pestov
3d7addbbf5
compiler.cfg.value-numbering.rewrite: disable ##compare optimizations for now
2009-07-04 03:26:37 -05:00
Slava Pestov
577a3cb968
compiler.cfg.value-numbering.rewrite: fix ##compare-imm rewrite rule
2009-07-04 02:50:50 -05:00
Doug Coleman
2ef03895ee
convert ##compare with immediates to ##compare-imm
2009-07-03 19:19:33 -05:00
Doug Coleman
9ce34bf972
add constant folding for integer ops, refactor some rewrites
2009-07-02 19:03:21 -05:00
Doug Coleman
f4d3daea7d
fix bug in rewriting #add -- wasn't checking small-enough?, and change negative adds to subtractions/negative subtractions to adds
2009-07-02 17:55:35 -05:00
Doug Coleman
89f33a1e45
rewrite rules for add/sub/mul/and/or/xor-imm, rewrite load-immediate/add to be add-imm
2009-07-02 11:35:31 -05:00
Doug Coleman
0ad81de3b6
combine add-imm instructions into a single add
2009-06-30 22:59:53 -05:00
Slava Pestov
0654e8fc51
Remove obsolete optimization
2009-06-01 03:05:49 -05:00
Slava Pestov
a07279bf6d
Fix compiler errors
2009-06-01 03:00:10 -05:00
Slava Pestov
968a9bb666
Various codegen improvements:
...
- new-insn word to construct instructions
- cache RPO in the CFG
- re-organize low-level optimizer so that MR is built after register allocation
- register allocation now stores instruction numbers in the instructions themselves
- split defs-vregs into defs-vregs and temp-vregs
2009-05-29 13:11:34 -05:00
Slava Pestov
6b25e99470
Add summary for heaps more vocabs
2009-02-16 21:05:13 -06:00
Slava Pestov
ab689c098b
Clean up direct literal code and make a first attempt at PowerPC support
2008-11-24 08:16:14 -06:00
Slava Pestov
eb05dd3a12
Optimize a ##dispatch that is applied to the result of a ##sub-imm or ##add-imm; this eliminates an instruction from the common 1 fixnum-fast { ... } dispatch and 8 fixnum-fast { ... } dispatch code sequences appearing in generic word expansions
2008-11-13 04:16:08 -06:00
Slava Pestov
64cbf619a9
Add more algebraic simplifications: comparison of a comparison, comparison where first is immediate
2008-11-06 09:27:52 -06:00
Slava Pestov
492a15e345
Move insn class to compiler.cfg.instructions
2008-10-24 09:17:06 -05:00
Slava Pestov
885adc8dc9
Various improvements
2008-10-23 05:27:54 -05:00
Slava Pestov
52967c5bf1
Improved value numbering
2008-10-23 02:49:26 -05:00