Slava Pestov
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26f309d2ae
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Trying to make PEGs compile faster by reducing the number of low level IR nodes: merge functionality of #>r and #r> into #shuffle, and generate 1 node instead of 3 for calls to get-local
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2008-11-11 18:46:31 -06:00 |
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Slava Pestov
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94a2bfa2ea
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Working on comparison operations, clearing out remaining dead wood
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2008-10-21 03:20:48 -05:00 |
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Slava Pestov
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e92f795a76
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More work on intrinsics; memory allocation and slot access now expands correctly
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2008-10-20 20:40:15 -05:00 |
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Slava Pestov
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f092622fac
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CFG IR is now pure SSA
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2008-10-20 01:56:28 -05:00 |
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Slava Pestov
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239578353f
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Simplifying vregs work in progress
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2008-10-17 15:35:04 -05:00 |
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Slava Pestov
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68c9b22cef
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Don't need known-tag templates any more
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2008-10-11 14:08:00 -05:00 |
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Slava Pestov
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f979ae5b82
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Expand slot accessors further to avoid having to use complex template decision
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2008-10-11 14:05:15 -05:00 |
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Slava Pestov
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cf46a832e7
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Debugging register allocator and inline allocation
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2008-10-08 23:42:53 -05:00 |
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Slava Pestov
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0e4e05d5cd
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Debugging new codegen
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2008-10-08 03:51:44 -05:00 |
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Slava Pestov
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7b6d9c4c4f
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Debugging new codegen
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2008-10-07 20:00:38 -05:00 |
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Slava Pestov
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f436fd0c0f
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Merging in new codegen
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2008-10-07 16:16:50 -05:00 |