4202211293
cpu.x86: cleanups
2009-09-28 16:38:35 -05:00
2e8bb98781
cpu.x86.assembler: make SSE shuffle instructions accept an array of indexes so they're easier to use
2009-09-28 11:45:45 -05:00
dfc9fd071e
Add longlong-2, ulonglong-2, longlong-4, ulonglong-4 SIMD types, fix int-4 multiplication on SSE2
2009-09-23 20:23:25 -05:00
563ecbd871
cpu.x86.assembler: cleanup
2009-09-23 19:30:36 -05:00
102df64ec7
i suck at reading tech docs--those were m64 instructions, not mm instructions
2009-09-02 12:58:35 -05:00
962d560c10
get rid of useless mm->xmm instructions in cpu.x86.assembler, add MOVHLPS and MOVLHPS
2009-09-02 11:06:08 -05:00
eb3bd1edea
cpu.x86.assembler: make some words private
2009-08-05 18:30:42 -05:00
b6ddcafcbd
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-30 11:05:36 -05:00
455956b16c
add additional SSE2 packed integer operations
2009-07-30 11:05:12 -05:00
1e8d13c1f1
cpu.x86.assembler: fix extended 8-bit registers (DIL, SIL, SPL, BPL)
2009-07-29 22:32:22 -05:00
73862a9a03
cpu.x86.assembler: move operands to operands sub-vocabulary, clean up small-reg-* code in compiler backend
2009-07-29 21:44:08 -05:00
9f3c8a9959
SSE4 opcodes for x86 assembler
2009-07-28 12:19:37 -05:00
5372113fce
SSE1–SSSE3 opcodes + branch hints for x86 assembler
2009-07-28 00:22:27 -05:00
45a2105449
cpu.x86.assembler: IMUL2 instruction was busted for immediate operands
...
When given a register and an immediate, it would generate imul imm,dst,dst however the 64-bit prefix was generated wrong and if dst was an extended register only the first operand would be an extended register. To fix this, change IMUL2 to not work on immediates anymore, and added a new IMUL3 that takes a destination register, source register, and immediate. Also, change compiler.cfg.two-operand to not two-operandize %mul-imm, since this isn't needed anymore.
This fixes the sporadic benchmark.tuple-arrays crash on 64-bit machines.
2009-06-08 21:15:52 -05:00
c93d876075
Better separation of concerns: cpu.{x86,ppc}.assembler no longer depends on compiler.codegen.fixup and cpu.architecture. Rename rt-xt-direct to rt-xt-pic to better explain its purpose
2009-05-06 16:14:53 -05:00
5188f4e1f0
Fix TEST opcode in cpu.x86.assembler
2009-04-29 22:23:42 -05:00
c15a4c1c5a
Add new relocation type for call sites which may be replaced by ICs
2009-04-28 17:53:14 -05:00
4d10105802
Working on inline caching
2009-04-28 03:48:37 -05:00
05e4626c49
Clean up
2008-12-09 03:22:09 -06:00
8a8f0c925c
Use BSR instruction to implement fixnum-log2 intrinsic
2008-12-06 15:31:17 -06:00
e4db2afb7e
Update cpu.x86.assembler to use dip instead of >r/r>
2008-12-02 03:10:01 -06:00
3e25d14e54
Code cleanup: refactoring usages of rot and -rot to use newer idioms instead
2008-11-30 17:47:29 -06:00
d86524f4bc
Non-optimizing compiler now compiles dip, 2dip, 3dip, if, with direct branches instead of indirect branches. 8% bootstrap time improvement on Core Duo 2
2008-11-24 00:23:17 -06:00
59f4f25b91
Loop alignment: appears to be a small win for reverse-complement
2008-11-03 06:20:51 -06:00
abb02f1784
Flesh out shift instructions
2008-11-03 00:03:00 -06:00
84820244dd
Merge branch 'master' into new_codegen
2008-10-21 23:19:20 -05:00
52020c2fe3
Fixing x86 instruction encoding for addressing with base = ESP or R12
2008-10-21 23:18:27 -05:00
fe2c20882a
Fix alien accessor intrinsics; a bit more complex now that we don't reserve a tempreg
2008-10-13 22:43:32 -05:00
7b6d9c4c4f
Debugging new codegen
2008-10-07 20:00:38 -05:00
c19f2257f4
Fix permission bits
2008-10-02 08:34:49 -05:00
44f53de164
Move make to its own vocabulary, remove fry _ feature
2008-09-10 20:07:00 -05:00
48fa2e2d0e
Updating some code
2008-08-12 03:31:48 -05:00
d66f887736
Create basis vocab root
2008-07-28 22:03:13 -05:00
Slava Pestov
Joe Groff
Slava Pestov