Commit Graph

7 Commits (5372113fce5fbb8005a6f00662b5d82d638da1d4)

Author SHA1 Message Date
Joe Groff 5372113fce SSE1–SSSE3 opcodes + branch hints for x86 assembler 2009-07-28 00:22:27 -05:00
Slava Pestov 45a2105449 cpu.x86.assembler: IMUL2 instruction was busted for immediate operands
When given a register and an immediate, it would generate imul imm,dst,dst however the 64-bit prefix was generated wrong and if dst was an extended register only the first operand would be an extended register. To fix this, change IMUL2 to not work on immediates anymore, and added a new IMUL3 that takes a destination register, source register, and immediate. Also, change compiler.cfg.two-operand to not two-operandize %mul-imm, since this isn't needed anymore.
This fixes the sporadic benchmark.tuple-arrays crash on 64-bit machines.
2009-06-08 21:15:52 -05:00
Slava Pestov 5188f4e1f0 Fix TEST opcode in cpu.x86.assembler 2009-04-29 22:23:42 -05:00
Slava Pestov abb02f1784 Flesh out shift instructions 2008-11-03 00:03:00 -06:00
Slava Pestov 52020c2fe3 Fixing x86 instruction encoding for addressing with base = ESP or R12 2008-10-21 23:18:27 -05:00
Slava Pestov 0c8e2584b4 Fixing unit tests for make, fry changes 2008-09-11 00:20:06 -05:00
Slava Pestov d66f887736 Create basis vocab root 2008-07-28 22:03:13 -05:00