5 Commits (72e71a33187361dfcb8c68fc8b45f3f2fe490f72)

Author	SHA1	Message	Date
Slava Pestov	513ba1f176	compiler.cfg.linearization.order: basic blocks were being inserted twice if some blocks had repeated successors, causing problems for register allocation	2009-09-22 03:19:23 -05:00
Slava Pestov	d0c393aa60	compiler.cfg: new system to track when results of analyses need to be recomputed (reverse post order, linear order, predecessors, dominance, loops). Passes can now call needs-predecessors, needs-dominance, needs-loops at the beginning, and cfg-changed, predecessors-changd at the end. Linearization order now takes loop nesting into account, and linear scan now uses linearization order instead of RPO.	2009-08-08 20:02:56 -05:00
Slava Pestov	21a012e3d7	compiler.cfg: Major restructuring -- do not compute liveness before local optimization, and instead change local optimizations to be more permissive of undefined values. Now, liveness is only computed once, after phi elimination and before register allocation. This means liveness analysis does not need to take phi nodes into account and can now use the new compiler.cfg.dataflow-analysis framework	2009-07-22 03:08:28 -05:00
Slava Pestov	e2044602aa	compiler.cfg.linear-scan: debugging spilling, add more assertions	2009-07-07 13:01:27 -05:00
Slava Pestov	e04df76f60	Various codegen improvements: ... - new-insn word to construct instructions - cache RPO in the CFG - re-organize low-level optimizer so that MR is built after register allocation - register allocation now stores instruction numbers in the instructions themselves - split defs-vregs into defs-vregs and temp-vregs	2009-05-29 13:11:34 -05:00