6 Commits (73c83333f276956f532c474b3d6dd943cea6f2c1)

Author	SHA1	Message	Date
Slava Pestov	73c83333f2	compiler: remove flat machine representation and generate code directly from the CFG	2010-05-03 17:34:32 -04:00
Slava Pestov	0778c20722	compiler.cfg.linearization.order: basic blocks were being inserted twice if some blocks had repeated successors, causing problems for register allocation	2009-09-22 03:19:23 -05:00
Slava Pestov	88d15dfbea	compiler.cfg: new system to track when results of analyses need to be recomputed (reverse post order, linear order, predecessors, dominance, loops). Passes can now call needs-predecessors, needs-dominance, needs-loops at the beginning, and cfg-changed, predecessors-changd at the end. Linearization order now takes loop nesting into account, and linear scan now uses linearization order instead of RPO.	2009-08-08 20:02:56 -05:00
Slava Pestov	5d9f7b0ed2	compiler.cfg: Major restructuring -- do not compute liveness before local optimization, and instead change local optimizations to be more permissive of undefined values. Now, liveness is only computed once, after phi elimination and before register allocation. This means liveness analysis does not need to take phi nodes into account and can now use the new compiler.cfg.dataflow-analysis framework	2009-07-22 03:08:28 -05:00
Slava Pestov	4ef76762e3	compiler.cfg.linear-scan: debugging spilling, add more assertions	2009-07-07 13:01:27 -05:00
Slava Pestov	968a9bb666	Various codegen improvements: ... - new-insn word to construct instructions - cache RPO in the CFG - re-organize low-level optimizer so that MR is built after register allocation - register allocation now stores instruction numbers in the instructions themselves - split defs-vregs into defs-vregs and temp-vregs	2009-05-29 13:11:34 -05:00