Slava Pestov
31ef4ad844
math.libm: fix regression: fsqrt intrinsic was not working ever since change was made to inline FUNCTION: bodies
2010-08-12 21:41:57 -07:00
Slava Pestov
f133a5f2be
compiler: re-architect low-level optimizer to allow more than one output value per instruction
2010-07-13 07:40:14 -04:00
Slava Pestov
73c83333f2
compiler: remove flat machine representation and generate code directly from the CFG
2010-05-03 17:34:32 -04:00
Slava Pestov
121743230d
compiler.cfg.debugger: add ssa. word to print IR before representation selection runs
2010-05-03 17:34:31 -04:00
Slava Pestov
ee890ed1cc
compiler.cfg.debugger: clean up and make it more flexible
2010-05-03 17:34:22 -04:00
Slava Pestov
16566506f1
compiler.cfg: remove unused 'reps' slot from compiler.cfg, and re-organize things in preparation for SSA register allocation
2010-05-03 17:34:18 -04:00
Joe Groff
409bdadfb8
add a "test-mr." word to compiler.cfg.debugger equivalent to "test-mr mr."
2009-09-30 11:34:19 -05:00
Slava Pestov
8617ac798e
Add a couple more def-is-use instructions
2009-09-27 20:34:20 -05:00
Slava Pestov
d5fb53d417
compiler.cfg.debugger: fix fake-representations so that low-level-ir tests can pass on x86
2009-08-25 23:44:01 -05:00
Slava Pestov
88d15dfbea
compiler.cfg: new system to track when results of analyses need to be recomputed (reverse post order, linear order, predecessors, dominance, loops). Passes can now call needs-predecessors, needs-dominance, needs-loops at the beginning, and cfg-changed, predecessors-changd at the end. Linearization order now takes loop nesting into account, and linear scan now uses linearization order instead of RPO.
2009-08-08 20:02:56 -05:00
Slava Pestov
2d575d7ec9
compiler.cfg: virtual registers are integers now, and representations are stored off to the side. Fix bug in representation selection that would manifest if a value was used as a float and a fixnum in different branches; cannot globally unbox float in this case
2009-08-08 04:02:18 -05:00
Slava Pestov
4d2160799f
Split off the notion of a register representation from a register class
2009-08-07 17:44:50 -05:00
Slava Pestov
1d289e68a4
compiler.cfg.debugger: fix load error
2009-08-02 08:11:04 -05:00
Slava Pestov
64b719269f
compiler.cfg.utilities: add each-phi combinator to iterate over all ##phi instructions in a basic block
2009-08-02 06:16:58 -05:00
Slava Pestov
8028eb5776
compiler.cfg: clean up unit tests using some new utilities
2009-08-02 03:49:25 -05:00
Slava Pestov
064248d25b
compiler.cfg.debugger: reset vreg counters
2009-07-27 22:28:13 -05:00
Slava Pestov
5d9f7b0ed2
compiler.cfg: Major restructuring -- do not compute liveness before local optimization, and instead change local optimizations to be more permissive of undefined values. Now, liveness is only computed once, after phi elimination and before register allocation. This means liveness analysis does not need to take phi nodes into account and can now use the new compiler.cfg.dataflow-analysis framework
2009-07-22 03:08:28 -05:00
Slava Pestov
0be3f33296
insn. doesn't print numbers
2009-07-10 03:05:45 -05:00
Slava Pestov
3b8733de01
Redesign compiler.cfg.stack-analysis to make compiler.cfg.height redundant, and to fix some problems
2009-06-26 17:29:55 -05:00
Slava Pestov
57d9d9f961
Split off local-optimization combinator into compiler.cfg.local, factor out CFG -> MR into compiler.cfg.mr, split off GC check insertion into a new compiler.cfg.gc-checks pass
2009-05-31 12:20:46 -05:00
Slava Pestov
968a9bb666
Various codegen improvements:
...
- new-insn word to construct instructions
- cache RPO in the CFG
- re-organize low-level optimizer so that MR is built after register allocation
- register allocation now stores instruction numbers in the instructions themselves
- split defs-vregs into defs-vregs and temp-vregs
2009-05-29 13:11:34 -05:00
Slava Pestov
057f75e9a1
Refactor compiler.tree.builder to fix various regressions
2009-04-21 23:02:00 -05:00
Slava Pestov
65a53e1fa5
Don't keep compiled-effect around anymore
2009-02-23 23:55:16 -06:00
Slava Pestov
4f0a9f311e
Untangling some dependencies
2008-12-08 14:58:00 -06:00
Slava Pestov
8df1aba71d
Coalescing
2008-11-02 01:49:57 -06:00
Slava Pestov
1f693b50b3
Massive focused action
2008-10-22 18:39:41 -05:00
Slava Pestov
f092622fac
CFG IR is now pure SSA
2008-10-20 01:56:28 -05:00
Slava Pestov
14d8696f40
Oops, don't mix register classes in active set
2008-10-19 03:34:42 -05:00
Slava Pestov
c0d89b061e
Fixing register allocator prspilling
2008-10-19 01:10:21 -05:00
Slava Pestov
7b6d9c4c4f
Debugging new codegen
2008-10-07 20:00:38 -05:00
Slava Pestov
f436fd0c0f
Merging in new codegen
2008-10-07 16:16:50 -05:00