Joe Groff
b411f1701a
make vshuffle-bytes intrinsic for any shuffle mask type
2009-10-19 12:25:55 -05:00
Joe Groff
421b61f0e8
fix type propagation information put on non-SIMD specializations of vany?, vall?, vnone?
2009-10-17 11:21:08 -05:00
Slava Pestov
4ed91ff5ee
syntax: fix docs for :
2009-10-16 23:45:10 -05:00
Joe Groff
d9002127fa
have vshuffle accept simd-128 variable byte shuffles
2009-10-10 11:30:11 -05:00
Joe Groff
01f5d392be
implement vneg as an intrinsic in terms of load -0, subtract
2009-10-09 13:16:39 -05:00
Joe Groff
4d4da7ac23
break vector conversion intrinsics off to a math.vectors.conversion.backend vocab so the whole conversion vocab doesn't get sucked in by the compiler
2009-10-06 21:28:33 -05:00
Joe Groff
785f8620fd
glue conversion intrinsics to instructions
2009-10-06 20:13:38 -05:00
Joe Groff
fbe810fc3b
rename SIMD vmerge and kids to (vmerge), make new vmerge more generally useful
2009-10-05 17:55:39 -05:00
Joe Groff
0c9c3d4859
add %merge-vector-head and %merge-vector-tail instructions to back vmerge
2009-10-03 21:48:53 -05:00
Joe Groff
01736e9bec
define simd equal? methods as v= vall?
2009-10-01 23:46:37 -05:00
Joe Groff
53b265f682
Merge branch 'master' of git://factorcode.org/git/factor
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Conflicts:
basis/compiler/codegen/codegen.factor
2009-10-01 23:14:16 -05:00
Joe Groff
952498ef69
create special intrinsic wrappers for 256-vector>scalar operations so that vall?, vany?, vnone? work on 256-vectors
2009-10-01 23:07:10 -05:00
Joe Groff
a93f8f66f9
Revert "add a %blend-vector intrinsic for v?"
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This reverts commit 21e4b28b67 .
2009-09-30 23:40:37 -05:00
Joe Groff
7db7b63552
add a %blend-vector intrinsic for v?
2009-09-30 23:03:59 -05:00
Joe Groff
e56cd5cc12
accept f and t as elements of literal simd vectors, storing binary all-zeroes or all-ones
2009-09-30 19:04:02 -05:00
Slava Pestov
80e84a357d
math.vectors.simd: add vbroadcast intrinsic, fix integer overflow issues
2009-09-29 22:58:20 -05:00
Slava Pestov
f395d83379
math.vectors.simd: add fast intrinsic for 'nth', replace broadcast primitive with shuffles
2009-09-29 04:48:11 -05:00
Slava Pestov
e40a95c1e1
math.vectors.simd: add vshuffle intrinsic
2009-09-28 23:12:13 -05:00
Slava Pestov
a8ea929ad9
Work in progress
2009-09-28 17:31:34 -05:00
Slava Pestov
9a06e6f424
math.vectors.simd: add intrinsic for int-4-boa, uint-4-boa, fix tests for C type parser change, fix software fallback for horizontal shifts
2009-09-28 06:34:22 -05:00
Slava Pestov
18cf8c37e1
math.vectors.simd: add *-cast words for converting between representations
2009-09-27 17:18:02 -05:00
Slava Pestov
7b6128dd03
math.vectors.simd: add v<< and v>> intrinsics for bitwise shifts on elements
2009-09-24 03:32:39 -05:00
Slava Pestov
43fa252af5
math.vectors.simd: new operations: vabs vsqrt vbitand vbitor vbitxor
2009-09-23 02:47:14 -05:00
Slava Pestov
ea44ea3522
math.vectors.simd: add saturated arithmetic operations
2009-09-20 23:16:02 -05:00
Slava Pestov
acea55c692
math.vectors: add v+- word which is accelerated by SSE3
2009-09-20 17:43:16 -05:00
Slava Pestov
47d8763340
More integer SIMD work
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- move generated vocab support from specialized-arrays to vocabs.generated
- add fuzz testing to math.vectors.simd
- add alien type support for integer SIMD vectors
- SIMD: parsing word generates a SIMD type, instead of pre-generating them all in math.vectors.simd
2009-09-20 16:48:17 -05:00
Slava Pestov
e77341b90c
math.vectors.simd: redesign to be more flexible, integer SIMD work in progress
2009-09-20 02:08:32 -05:00
Joe Groff
1f04ed01fe
fix more ambiguities
2009-09-17 09:29:23 -05:00
Slava Pestov
6494e7a53b
math.vectors.simd: slightly faster 'sum' on 256-bit vectors: add the two components then do horizontal add, instead of doing a horizontal add on each one and adding the results
2009-09-04 02:23:25 -05:00
Slava Pestov
6b5e40b2fc
functors: support private words with DEFINES-PRIVATE; use this to make some words generated by math.vectors.simd.functor private
2009-09-04 01:21:59 -05:00
Slava Pestov
55c449c6e2
math.vectors.simd: define fallbacks for all vector constructors so that code can still work even if SIMD is not available
2009-09-03 21:37:55 -05:00
Slava Pestov
4d5a4222b6
More SIMD work
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- Rename SIMD types and register representations: <type>-<count> rather than <count><type>-array
- Make a functor to define 256-bit vector types, use it to define float-8 type
- Make SIMD instructions pure-insns so that they participate in value numbering
2009-09-03 20:58:56 -05:00
Slava Pestov
ff8c70dbe0
Initial implementation of SSE vector intrinsics:
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- cpu.architecture: add SSE vector representations
- compiler.cfg.intrinsics.alien: remove an attempt at optimization that value numbering handles now
- compiler.cfg.representations: support instructions where the representation is set in the 'rep' slot, and support conversions between single and double floats
- alien-float, set-alien-float now use the single float representation, and the conversion is implicit; this fixes a long-standing bug where a register could get clobbered because of how %set-alien-float was defined on x86
- math.vectors.specialization: add support for SIMD specialization (where the vector word's body is replaced by another quotation), also specialize the 'sum' word
- math.vectors.simd: 4float-array, 2double-array, 4double-array types, and specializers for the math.vectors words
2009-09-03 02:33:07 -05:00