5de88bcd88
compiler.cfg: don't need to escape the symbol here.
2012-08-02 15:14:42 -07:00
f05bc12553
compiler: more peephole tests for shl/sar
2011-11-13 16:10:24 -08:00
b123bf31b2
compiler.cfg: Rename <##foo> to ##foo, in the low-level IR
2011-11-11 19:48:38 -08:00
cb66728b26
compiler.cfg: Change low-level IR constructors from ##foo to <##foo>
2011-11-06 23:02:46 -08:00
f419934d6a
Cleanup lint warnings.
2011-10-14 11:47:24 -07:00
2e4127cc20
compiler.cfg.representations: fix unit test, it depended on hashing order which changed recently
2011-10-10 12:15:41 -07:00
571ef865e6
slots: pre-create the "at", "nth", and "global" slots to make deterministic the currently nondeterministic ambiguity between accessors:change-* and assocs:change-at, sequences:change-nth, and namespaces:change-global
2011-09-19 10:03:43 -07:00
f69411fcfb
compiler.cfg: now that kill-blocks cannot contain instructions that define vregs we can skip them all
2010-07-27 12:40:31 -04:00
f133a5f2be
compiler: re-architect low-level optimizer to allow more than one output value per instruction
2010-07-13 07:40:14 -04:00
c0f39aa99d
Move remaining sequence operations from generalizations to sequences.generalizations where they belong
2010-05-18 18:36:47 -04:00
0dbc9eaae0
compiler.cfg: more silly optimizations
2010-05-14 18:37:09 -04:00
5a36954a86
compiler.cfg: use x86 TEST instruction to optimize 'bitand 0 ='
2010-05-14 18:37:06 -04:00
3d66820344
FFI rewrite part 1: split up ##alien-invoke and friends into smaller instructions
2010-05-09 21:36:52 -04:00
6d367ba038
compiler.cfg: add ##load-float instruction for single precision floating point constants
2010-05-07 18:26:00 -04:00
7f0469efef
compiler: new "binary literal area" at the end of a word's machine code stores constant floats and SIMD vectors; this allows ##load-reference/##load-memory fusion to be performed on x86-64, with a RIP-relative address reaching the data; also simplifies VM since custom relocation types used by the previous 32-bit-only optimization are no longer needed
2010-05-03 17:34:35 -04:00
b051c6cb54
compiler.cfg.representations: make sure that immediate operands fit
2010-05-03 17:34:34 -04:00
90b945eaa0
compiler: add ##load-vector instruction to avoid wasting a temporary register on x86-32
2010-05-03 17:34:28 -04:00
d8fc595383
compiler.cfg: clean up ##phi literals in tests
2010-05-03 17:34:24 -04:00
16566506f1
compiler.cfg: remove unused 'reps' slot from compiler.cfg, and re-organize things in preparation for SSA register allocation
2010-05-03 17:34:18 -04:00
03bd160f08
Code cleanups
2010-05-03 17:34:17 -04:00
73c34341d7
compiler.cfg.representations: simplify a little
2010-05-03 17:34:11 -04:00
808be63c07
compiler.cfg.representations: add peephole optimizations for integer comparisons
2010-05-03 17:34:11 -04:00
8af111577c
compiler.cfg.representations: fix various bugs
2010-05-03 17:34:11 -04:00
9b130730b6
compiler.cfg.representations: add more peephole optimizations to reduce fixnum tagging and untagging overhead
2010-05-03 17:34:11 -04:00
becd957d29
compiler.cfg: merge all alien accessors into ##load-memory-imm and ##store-memory-imm
2010-05-03 17:34:06 -04:00
c94666073b
compiler.cfg.representations: peephole optimizations are used to simplify the case where the input to a ##shl-imm or ##sar-imm needs to be untagged
2010-05-03 17:34:03 -04:00
6fdcd9fb02
Untagged fixnums work in progress
2010-05-03 17:34:02 -04:00
19412e4ad1
compiler: Start using tagged-rep for stuff, and split up compiler.cfg.representations into several sub-vocabularies
2010-05-03 17:34:01 -04:00
1d7089dc04
compiler: combine ##load-constant followed by ##alien-double into a ##load-double on x86-32, saving an integer register
2010-04-18 21:42:45 -05:00
1b61e2e5cf
Merge branch 'bags' of git://github.com/littledan/Factor
...
Conflicts:
basis/compiler/cfg/ssa/construction/tdmsc/tdmsc.factor
basis/furnace/auth/auth.factor
basis/stack-checker/backend/backend.factor
2010-03-16 13:28:00 -04:00
d4a0a69eb1
generalize stack effects so we can bootstrap with the stricter stack effect checking
2010-03-08 23:38:10 -08:00
0f0571e48a
Moving new-sets to sets
2010-02-26 16:01:01 -05:00
f1479e800b
Merge branch 'master' into new_gc
2009-11-02 20:11:43 -06:00
bb202805d8
compiler.cfg: don't generate useless methods in instruction meta-programming. reduces bootstrap time
2009-11-02 20:11:29 -06:00
d65296b334
vm: 4 bit tags, new representation of alien objects makes unbox-any-c-ptr more efficient (work in progress)
2009-11-02 04:25:54 -06:00
b5fd809209
memq? -> member-eq?, sorted-memq? -> sorted-member-eq?
2009-10-28 15:02:00 -05:00
82992f6dd4
reverse-here -> reverse!
2009-10-28 14:40:15 -05:00
0dfeb74176
typo in convert-to-fill-vector?
2009-10-07 12:53:10 -05:00
aee85401af
convert all-ones vector ##load-reference/##load-constant to a ##fill-vector insn
2009-10-07 12:35:21 -05:00
6740956162
compiler.cfg: don't unbox the same value more than once per basic block
2009-10-01 19:41:23 -05:00
e6ff877362
compiler.cfg.instructions: remove ##box-float, ##unbox-float, ##box-vector, ##unbox-vector since they can be expressed in terms of ##alien-double, ##set-alien-double, ##alien-vector, ##set-alien-vector, and ##allot
2009-10-01 18:07:50 -05:00
8e201ca4b7
Various minor compiler tweaks: Combine address calculation with dereferencing in alien accessors; convert SIMD XOR of a vector with itself into an XOR of the destination with itself; convert SIMD unbox of zero vector into XOR of the destination with itself; fix SIMD indexing on x86-64
2009-09-30 05:00:36 -05:00
ba3a06b745
compiler.cfg.value-numbering: add some more rewrite rules, neg/neg, not/not, and a few for SIMD
2009-09-30 02:18:29 -05:00
24039cb56a
math.vectors.simd: add v<< and v>> intrinsics for bitwise shifts on elements
2009-09-24 03:32:39 -05:00
555543faae
compiler: tweak generated code
2009-09-04 03:01:18 -05:00
1c87486320
math.vectors.simd: allow punning SIMD vectors between types
2009-09-04 02:35:58 -05:00
20dfbf7ac8
More SIMD work
...
- Rename SIMD types and register representations: <type>-<count> rather than <count><type>-array
- Make a functor to define 256-bit vector types, use it to define float-8 type
- Make SIMD instructions pure-insns so that they participate in value numbering
2009-09-03 20:58:56 -05:00
52b99c050e
Initial implementation of SSE vector intrinsics:
...
- cpu.architecture: add SSE vector representations
- compiler.cfg.intrinsics.alien: remove an attempt at optimization that value numbering handles now
- compiler.cfg.representations: support instructions where the representation is set in the 'rep' slot, and support conversions between single and double floats
- alien-float, set-alien-float now use the single float representation, and the conversion is implicit; this fixes a long-standing bug where a register could get clobbered because of how %set-alien-float was defined on x86
- math.vectors.specialization: add support for SIMD specialization (where the vector word's body is replaced by another quotation), also specialize the 'sum' word
- math.vectors.simd: 4float-array, 2double-array, 4double-array types, and specializers for the math.vectors words
2009-09-03 02:33:07 -05:00
775b9af2f7
compiler: eliminate boilerplate by centralizing info in declarative INSN: syntax
2009-09-02 06:22:37 -05:00
b35a01879e
%box-displaced-alien: fix clobberage found by Doug
2009-08-30 05:11:08 -05:00
John Benediktsson
Joe Groff
Doug Coleman
Slava Pestov
Slava Pestov
Daniel Ehrenberg
Slava Pestov