ca8d4c15f4
add ##shl-vector-imm and ##shr-vector-imm insn variants. use merge/shr instead of compare/merge to do signed unpacks
2009-10-30 00:41:19 -05:00
22a9be5ea5
update existing code to use :> ( ) when possible
2009-10-28 16:11:33 -05:00
a2976083be
generate unsigned vector comparison fallbacks using min/max or xor/signed compare
2009-10-20 22:30:57 -05:00
a0a816e88a
generate better fallback code for vmin/vmax intrinsics
2009-10-20 19:22:38 -05:00
bff46b80a8
fix unsigned vector unpack
2009-10-16 14:25:33 -05:00
2577ab83a6
only emit ##alien-vector/##set-alien-vector insns if the rep is available
2009-10-10 12:53:10 -05:00
61befc8bb1
have vshuffle accept simd-128 variable byte shuffles
2009-10-10 11:30:11 -05:00
5158a12d32
rename ##shuffle-vector to ##shuffle-vector-imm, and add a new ##shuffle-vector for dynamic shuffles. have vshuffle use ##shuffle-vector to do word and byte shuffles on x86
2009-10-09 21:26:27 -05:00
2bfcd7ed81
generate better code for vabs when instruction isn't available instead of using software fallback (-0.0 andn for floats, x > 0 ? x : -x for signed ints, nop for unsigned ints)
2009-10-09 14:24:55 -05:00
4972fbcbc9
implement vneg as an intrinsic in terms of load -0, subtract
2009-10-09 13:16:39 -05:00
98836a9e2e
break vector compare intrinsics into %compare, %or, and %not instructions that map directly to cpu instructions
2009-10-07 15:27:03 -05:00
43b51ef2eb
decompose %unpack-vector-head/tail into %compare-vector/%merge-vector-head/tail or %tail>head-vector/%unpack-vector-head insns when there isn't an actual unpack insn; get rid of fake x86 implementations
2009-10-07 14:09:46 -05:00
a13e75f4f4
don't generate a ##not-vector instruction if the cpu doesn't have one; instead, fall back to a ##fill-vector/##xor-vector combo. get rid of pretend %not-vector in cpu.x86
2009-10-07 11:59:36 -05:00
65421b111b
math.vectors.simd: use fallbacks for hlshift, hrshift, vshuffle if parameter is not a literal;al; element access in int-4 on x86-64 now sign-extends the value; don't throw error at compile time if parameter for vshuffle does not have enough elements
2009-09-30 20:04:37 -05:00
1c8662ce4a
math.vectors.simd: add vbroadcast intrinsic, fix integer overflow issues
2009-09-29 22:58:20 -05:00
2b13245704
math.vectors.simd: add fast intrinsic for 'nth', replace broadcast primitive with shuffles
2009-09-29 04:48:11 -05:00
a6e8277b2c
math.vectors.simd: add vshuffle intrinsic
2009-09-28 23:12:13 -05:00
db217295b0
Work in progress
2009-09-28 17:31:34 -05:00
10c5fe5933
math.vectors.simd: add hlshift, hrshift (128-bit shift), vbitandn intrinsics
2009-09-28 02:17:46 -05:00
8223715a07
compiler.cfg.intrinsics: fix type detection on the alien type for vector accessors
2009-09-04 02:22:54 -05:00
52b99c050e
Initial implementation of SSE vector intrinsics:
...
- cpu.architecture: add SSE vector representations
- compiler.cfg.intrinsics.alien: remove an attempt at optimization that value numbering handles now
- compiler.cfg.representations: support instructions where the representation is set in the 'rep' slot, and support conversions between single and double floats
- alien-float, set-alien-float now use the single float representation, and the conversion is implicit; this fixes a long-standing bug where a register could get clobbered because of how %set-alien-float was defined on x86
- math.vectors.specialization: add support for SIMD specialization (where the vector word's body is replaced by another quotation), also specialize the 'sum' word
- math.vectors.simd: 4float-array, 2double-array, 4double-array types, and specializers for the math.vectors words
2009-09-03 02:33:07 -05:00
Joe Groff
Slava Pestov
Slava Pestov