b35a01879e
%box-displaced-alien: fix clobberage found by Doug
2009-08-30 05:11:08 -05:00
f6a836d1e9
compiler.cfg.linear-scan now supports partial sync-points where all registers are spilled; taking advantage of this, there are new trigonometric intrinsics which yield a 2x performance boost on benchmark.struct-arrays and a 25% boost on benchmark.partial-sums
2009-08-30 04:52:01 -05:00
f30aa5d20e
compiler: add fixnum-min/max intrinsics; ~10% speedup on benchmark.yuv-to-rgb
2009-08-28 19:02:59 -05:00
99bf9fadfb
Performance improvements to make struct-arrays benchmark faster
...
- improved optimization of ##unbox-any-c-ptr on ##box-displaced-alien; convert it to ##unbox-c-ptr where possible using class info stored in the ##bda instruction
- make fcos, fsin, etc inline again; everything in math.libm inline again, except for fsqrt which is an intrinsic
- convert min and max on floats to float-min and float-max
- make min and max not inline, so that the above can work
- struct-arrays: rice a bit so that more fixnums come up
2009-08-28 05:21:16 -05:00
8970cbc961
cpu.ppc: fix ##box-displaced-alien
2009-08-27 04:43:45 -05:00
9caf3f9248
compiler: new inline intrinsic for <displaced-alien> where the inputs have known types; value numbering now eliminates unnecessary allocation of displaced aliens if the result is immediately unboxed again
2009-08-27 00:06:19 -05:00
4fe0257169
cpu.x86: use SQRTSD instruction for math.libm:fsqrt word
2009-08-25 23:22:15 -05:00
e44b2eb875
cpu.ppc.assembler: LOAD32 assembler macro was busted
2009-08-25 22:37:10 -05:00
9805dde418
basis/cpu: eliminate some usages of rot
2009-08-25 19:38:48 -05:00
e9818be8ae
cpu.ppc.assembler: fix FMR and FMR. opcodes
2009-08-25 19:33:35 -05:00
90b3921b31
cpu.ppc: integer>fixnum scratch area overlapped with the rest of stack frame, very bad
2009-08-22 20:23:28 -05:00
1b8636bad5
Merge branch 'master' of git://factorcode.org/git/factor
2009-08-21 18:48:44 -05:00
b1a12f85e4
cpu.ppc: work in progress
2009-08-21 18:48:34 -05:00
d1ce837569
Delete empty unit tests files, remove 1- and 1+, reorder IN: lines in a lot of places, minor refactoring
2009-08-13 19:21:44 -05:00
2d575d7ec9
compiler.cfg: virtual registers are integers now, and representations are stored off to the side. Fix bug in representation selection that would manifest if a value was used as a float and a fixnum in different branches; cannot globally unbox float in this case
2009-08-08 04:02:18 -05:00
4d2160799f
Split off the notion of a register representation from a register class
2009-08-07 17:44:50 -05:00
a7e61632d9
cpu.x86.assembler: make some words private
2009-08-05 18:30:42 -05:00
203a64f236
cpu.ppc: put spill slots and GC roots in stack frame where subroutine calls can't clobber them
2009-07-31 23:47:07 -05:00
ebec4ffd75
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-31 17:59:00 -05:00
0e59d29282
cpu.ppc: fix small typos
2009-07-31 17:57:15 -05:00
c33343b302
fix using list on win64
2009-07-31 16:27:18 -05:00
e32477fd59
cpu.ppc: Updating PowerPC backend for codegen changes over the last two months: new shift intrinsics added, fixnum overflow intrinsics are now treated like conditionals, GC checks are more complex and have a different API
2009-07-30 21:44:22 -05:00
db55a031df
Move a bunch of GC check generation logic to platform-independent side
2009-07-30 21:28:27 -05:00
d09013b311
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-30 19:11:02 -05:00
b49fb43b60
Merge branch 'master' of git://factorcode.org/git/factor
2009-07-30 11:05:36 -05:00
c59c619364
add additional SSE2 packed integer operations
2009-07-30 11:05:12 -05:00
99216b8435
compiler.cfg: Get inline GC checks working again, using a dataflow analysis to compute uninitialized stack locations in compiler.cfg.stacks.uninitialized. Re-enable intrinsics which use inline allocation
2009-07-30 09:19:44 -05:00
e3c38262ed
Oopsie
2009-07-30 08:27:52 -05:00
c9feb6f012
cpu.x86: Fix shuffle bug. Shuffling bugs occurring in code that runs before optimizer/stack checker is online are only caught at runtime during bootstrap, what a pain
2009-07-30 05:12:40 -05:00
4842641e75
cpu.x86: fix a bug in small-register logic on 32-bit. Also, on 32-bit, we don't need to do any special register shuffling to work with 16-bit operands since all registers have 16-bit variants. So now only 8-bit operands on x86-32 require special treatment
2009-07-30 05:04:46 -05:00
32a3abc9b4
cpu.x86: update non-optimizing compiler backends for assembler vocab split
2009-07-30 02:22:37 -05:00
226908d2d2
cpu.x86.assembler: fix extended 8-bit registers (DIL, SIL, SPL, BPL)
2009-07-29 22:32:22 -05:00
0899934220
cpu.x86: use full set of 8-bit, 16-bit and 32-bit registers on x86-64 to avoid clumsy save/restore logic
2009-07-29 21:56:37 -05:00
7831293fda
cpu.x86.assembler: move operands to operands sub-vocabulary, clean up small-reg-* code in compiler backend
2009-07-29 21:44:08 -05:00
c1fd97d515
Merge branch 'dcn'
2009-07-28 12:37:45 -05:00
4c664a469a
SSE4 opcodes for x86 assembler
2009-07-28 12:19:37 -05:00
afd914c808
Merge branch 'master' into dcn
2009-07-28 11:20:43 -05:00
1fe11f7c87
SSE1–SSSE3 opcodes + branch hints for x86 assembler
2009-07-28 00:22:27 -05:00
f0a5ac3fbb
cpu.x86: compile a load of zero, and adds, subs where dst = src1 more efficiently
2009-07-27 22:27:54 -05:00
39a70db831
Improve code generation for shift word: add intrinsics for fixnum-shift-fast in the case where the shift count is not constant, transform 1 swap shift into a more overflow check with open-coded fast case, transform bitand into fixnum-bitand in more cases
2009-07-16 23:50:48 -05:00
99faf3c79f
Overflowing fixnum intrinsics now expand into several CFG nodes. This speeds up the common case since only the uncommon case is now a stack syncpoint
2009-07-16 18:29:40 -05:00
1eae4286cd
compiler.cfg: split off condition codes into a comparisons sub-vocabulary
2009-07-13 14:42:52 -05:00
27c0577c91
cpu.x86.32: don't emit sub %esp,0x0 in prologue on Linux and Windows
2009-07-01 18:13:45 -05:00
554559c0b1
%dispatch: sometimes the generated sequence is one byte longer, so instead of hard-coding it, compute the right length
2009-06-30 18:11:15 -05:00
4782c737ab
cpu.x86: don't clobber src in %dispatch
2009-06-30 16:47:22 -05:00
a61a992bfd
cpu.x86.assembler: IMUL2 instruction was busted for immediate operands
...
When given a register and an immediate, it would generate imul imm,dst,dst however the 64-bit prefix was generated wrong and if dst was an extended register only the first operand would be an extended register. To fix this, change IMUL2 to not work on immediates anymore, and added a new IMUL3 that takes a destination register, source register, and immediate. Also, change compiler.cfg.two-operand to not two-operandize %mul-imm, since this isn't needed anymore.
This fixes the sporadic benchmark.tuple-arrays crash on 64-bit machines.
2009-06-08 21:15:52 -05:00
0d265fe016
Remove %dispatch-label since its tehe same on all platforms; fix %gc on PowerPC
2009-06-07 21:46:28 -05:00
f0b132fa7f
Fix 32-bit bootstrap
2009-06-03 03:23:55 -05:00
fd710385e5
cpu.x86: fix small register intrinsics on x86-64
2009-06-03 03:22:46 -05:00
7aca076408
GC checks now save and restore registers
2009-06-02 18:23:47 -05:00
Slava Pestov
sheeple
Slava Pestov
Doug Coleman
Slava Pestov
Joe Groff